diff mbox series

[v2,3/6] drm/i915: Enable async flips in i915

Message ID 20200420094746.20409-4-karthik.b.s@intel.com (mailing list archive)
State New, archived
Headers show
Series Asynchronous flip implementation for i915 | expand

Commit Message

Karthik B S April 20, 2020, 9:47 a.m. UTC
Enable asynchronous flips in i915 for gen9+ platforms.

v2: -Async flip enablement should be a stand alone patch (Paulo)

Signed-off-by: Karthik B S <karthik.b.s@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Zanoni, Paulo R April 20, 2020, 6:04 p.m. UTC | #1
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu:
> Enable asynchronous flips in i915 for gen9+ platforms.
> 
> v2: -Async flip enablement should be a stand alone patch (Paulo)

... and at the very end of the series.

If someone is bisecting the Kernel for some problem unrelated to async
flips, and they end up exactly at this commit, and their user space
happens to try to do async flips, will their system be broken? A quick
check at patches 4, 5 and 6 suggests they are necessary for the feature
to work, so here we're enabling a feature that we know won't work
because its support is not fully merged yet.

A patch series is not allowed to break the Kernel in the middle and
then fix it later.

> 
> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index cf8f5779dee4..8601b159f425 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -17574,6 +17574,9 @@ static void intel_mode_config_init(struct drm_i915_private *i915)
>  
>  	mode_config->funcs = &intel_mode_funcs;
>  
> +	if (INTEL_GEN(i915) >= 9)
> +		mode_config->async_page_flip = true;
> +
>  	/*
>  	 * Maximum framebuffer dimensions, chosen to match
>  	 * the maximum render engine surface size on gen4+.
Karthik B S May 29, 2020, 4:10 a.m. UTC | #2
On 4/20/2020 11:34 PM, Paulo Zanoni wrote:
> Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu:
>> Enable asynchronous flips in i915 for gen9+ platforms.
>>
>> v2: -Async flip enablement should be a stand alone patch (Paulo)
> 
> ... and at the very end of the series.
> 
> If someone is bisecting the Kernel for some problem unrelated to async
> flips, and they end up exactly at this commit, and their user space
> happens to try to do async flips, will their system be broken? A quick
> check at patches 4, 5 and 6 suggests they are necessary for the feature
> to work, so here we're enabling a feature that we know won't work
> because its support is not fully merged yet.
> 
> A patch series is not allowed to break the Kernel in the middle and
> then fix it later.
> 

Understood.
Moved this patch to the end of the series.

Thanks,
Karthik.B.S
>>
>> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index cf8f5779dee4..8601b159f425 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -17574,6 +17574,9 @@ static void intel_mode_config_init(struct drm_i915_private *i915)
>>   
>>   	mode_config->funcs = &intel_mode_funcs;
>>   
>> +	if (INTEL_GEN(i915) >= 9)
>> +		mode_config->async_page_flip = true;
>> +
>>   	/*
>>   	 * Maximum framebuffer dimensions, chosen to match
>>   	 * the maximum render engine surface size on gen4+.
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index cf8f5779dee4..8601b159f425 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17574,6 +17574,9 @@  static void intel_mode_config_init(struct drm_i915_private *i915)
 
 	mode_config->funcs = &intel_mode_funcs;
 
+	if (INTEL_GEN(i915) >= 9)
+		mode_config->async_page_flip = true;
+
 	/*
 	 * Maximum framebuffer dimensions, chosen to match
 	 * the maximum render engine surface size on gen4+.