diff mbox series

drm/i915/icl: Fix timeout handling during TypeC AUX power well enabling

Message ID 20200422123440.19522-1-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/icl: Fix timeout handling during TypeC AUX power well enabling | expand

Commit Message

Imre Deak April 22, 2020, 12:34 p.m. UTC
Fix the check for when an AUX power well enabling timeout is expected on
a legacy TypeC port.

Fixes: 89e01caac641 ("drm/i915: Use single set of AUX powerwell ops for gen11+")
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 74 +++++++------------
 1 file changed, 25 insertions(+), 49 deletions(-)

Comments

Souza, Jose April 22, 2020, 3:31 p.m. UTC | #1
On Wed, 2020-04-22 at 15:34 +0300, Imre Deak wrote:
> Fix the check for when an AUX power well enabling timeout is expected
> on
> a legacy TypeC port.
> 
> Fixes: 89e01caac641 ("drm/i915: Use single set of AUX powerwell ops
> for gen11+")

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  .../drm/i915/display/intel_display_power.c    | 74 +++++++--------
> ----
>  1 file changed, 25 insertions(+), 49 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 721e9ba96d34..49998906cc61 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -20,8 +20,6 @@
>  #include "intel_tc.h"
>  #include "intel_vga.h"
>  
> -static const struct i915_power_well_ops
> icl_tc_phy_aux_power_well_ops;
> -
>  bool intel_display_power_well_is_enabled(struct drm_i915_private
> *dev_priv,
>  					 enum i915_power_well_id
> power_well_id);
>  
> @@ -328,30 +326,9 @@ aux_ch_to_digital_port(struct drm_i915_private
> *dev_priv,
>  	return dig_port;
>  }
>  
> -static bool tc_phy_aux_timeout_expected(struct drm_i915_private
> *dev_priv,
> -					struct i915_power_well
> *power_well)
> -{
> -	/* An AUX timeout is expected if the TBT DP tunnel is down. */
> -	if (power_well->desc->hsw.is_tc_tbt)
> -		return true;
> -
> -	/*
> -	 * An AUX timeout is expected because we enable TC legacy port
> aux
> -	 * to hold port out of TC cold
> -	 */
> -	if (INTEL_GEN(dev_priv) == 11 &&
> -	    power_well->desc->ops == &icl_tc_phy_aux_power_well_ops) {
> -		enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv,
> power_well);
> -		struct intel_digital_port *dig_port =
> aux_ch_to_digital_port(dev_priv, aux_ch);
> -
> -		return dig_port->tc_legacy_port;
> -	}
> -
> -	return false;
> -}
> -
>  static void hsw_wait_for_power_well_enable(struct drm_i915_private
> *dev_priv,
> -					   struct i915_power_well
> *power_well)
> +					   struct i915_power_well
> *power_well,
> +					   bool timeout_expected)
>  {
>  	const struct i915_power_well_regs *regs = power_well->desc-
> >hsw.regs;
>  	int pw_idx = power_well->desc->hsw.idx;
> @@ -362,8 +339,7 @@ static void hsw_wait_for_power_well_enable(struct
> drm_i915_private *dev_priv,
>  		drm_dbg_kms(&dev_priv->drm, "%s power well enable
> timeout\n",
>  			    power_well->desc->name);
>  
> -		drm_WARN_ON(&dev_priv->drm,
> -			    !tc_phy_aux_timeout_expected(dev_priv,
> power_well));
> +		drm_WARN_ON(&dev_priv->drm, !timeout_expected);
>  
>  	}
>  }
> @@ -422,8 +398,8 @@ static void gen9_wait_for_power_well_fuses(struct
> drm_i915_private *dev_priv,
>  					  SKL_FUSE_PG_DIST_STATUS(pg),
> 1));
>  }
>  
> -static void hsw_power_well_enable_prepare(struct drm_i915_private
> *dev_priv,
> -					  struct i915_power_well
> *power_well)
> +static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
> +				  struct i915_power_well *power_well)
>  {
>  	const struct i915_power_well_regs *regs = power_well->desc-
> >hsw.regs;
>  	int pw_idx = power_well->desc->hsw.idx;
> @@ -448,14 +424,8 @@ static void hsw_power_well_enable_prepare(struct
> drm_i915_private *dev_priv,
>  	val = intel_de_read(dev_priv, regs->driver);
>  	intel_de_write(dev_priv, regs->driver,
>  		       val | HSW_PWR_WELL_CTL_REQ(pw_idx));
> -}
>  
> -static void hsw_power_well_enable_complete(struct drm_i915_private
> *dev_priv,
> -					   struct i915_power_well
> *power_well)
> -{
> -	int pw_idx = power_well->desc->hsw.idx;
> -
> -	hsw_wait_for_power_well_enable(dev_priv, power_well);
> +	hsw_wait_for_power_well_enable(dev_priv, power_well, false);
>  
>  	/* Display WA #1178: cnl */
>  	if (IS_CANNONLAKE(dev_priv) &&
> @@ -481,13 +451,6 @@ static void
> hsw_power_well_enable_complete(struct drm_i915_private *dev_priv,
>  				   power_well->desc->hsw.has_vga);
>  }
>  
> -static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
> -				  struct i915_power_well *power_well)
> -{
> -	hsw_power_well_enable_prepare(dev_priv, power_well);
> -	hsw_power_well_enable_complete(dev_priv, power_well);
> -}
> -
>  static void hsw_power_well_disable(struct drm_i915_private
> *dev_priv,
>  				   struct i915_power_well *power_well)
>  {
> @@ -527,7 +490,7 @@ icl_combo_phy_aux_power_well_enable(struct
> drm_i915_private *dev_priv,
>  			       val | ICL_LANE_ENABLE_AUX);
>  	}
>  
> -	hsw_wait_for_power_well_enable(dev_priv, power_well);
> +	hsw_wait_for_power_well_enable(dev_priv, power_well, false);
>  
>  	/* Display WA #1178: icl */
>  	if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <=
> ICL_PW_CTL_IDX_AUX_B &&
> @@ -633,24 +596,37 @@ icl_tc_phy_aux_power_well_enable(struct
> drm_i915_private *dev_priv,
>  {
>  	enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
>  	struct intel_digital_port *dig_port =
> aux_ch_to_digital_port(dev_priv, aux_ch);
> +	const struct i915_power_well_regs *regs = power_well->desc-
> >hsw.regs;
> +	bool is_tbt = power_well->desc->hsw.is_tc_tbt;
> +	bool timeout_expected;
>  	u32 val;
>  
>  	icl_tc_port_assert_ref_held(dev_priv, power_well, dig_port);
>  
>  	val = intel_de_read(dev_priv, DP_AUX_CH_CTL(aux_ch));
>  	val &= ~DP_AUX_CH_CTL_TBT_IO;
> -	if (power_well->desc->hsw.is_tc_tbt)
> +	if (is_tbt)
>  		val |= DP_AUX_CH_CTL_TBT_IO;
>  	intel_de_write(dev_priv, DP_AUX_CH_CTL(aux_ch), val);
>  
> -	hsw_power_well_enable_prepare(dev_priv, power_well);
> +	val = intel_de_read(dev_priv, regs->driver);
> +	intel_de_write(dev_priv, regs->driver,
> +		       val | HSW_PWR_WELL_CTL_REQ(power_well->desc-
> >hsw.idx));
>  
> -	if (INTEL_GEN(dev_priv) == 11 && dig_port->tc_legacy_port)
> +	/*
> +	 * An AUX timeout is expected if the TBT DP tunnel is down,
> +	 * or need to enable AUX on a legacy TypeC port as part of the
> TC-cold
> +	 * exit sequence.
> +	 */
> +	timeout_expected = is_tbt;
> +	if (INTEL_GEN(dev_priv) == 11 && dig_port->tc_legacy_port) {
>  		icl_tc_cold_exit(dev_priv);
> +		timeout_expected = true;
> +	}
>  
> -	hsw_power_well_enable_complete(dev_priv, power_well);
> +	hsw_wait_for_power_well_enable(dev_priv, power_well,
> timeout_expected);
>  
> -	if (INTEL_GEN(dev_priv) >= 12 && !power_well->desc-
> >hsw.is_tc_tbt) {
> +	if (INTEL_GEN(dev_priv) >= 12 && !is_tbt) {
>  		enum tc_port tc_port;
>  
>  		tc_port = TGL_AUX_PW_TO_TC_PORT(power_well->desc-
> >hsw.idx);
Imre Deak April 23, 2020, 11:38 a.m. UTC | #2
On Wed, Apr 22, 2020 at 05:55:58PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/icl: Fix timeout handling during TypeC AUX power well enabling
> URL   : https://patchwork.freedesktop.org/series/76336/
> State : success

Pushed, thanks for the review.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_8348_full -> Patchwork_17421_full
> ====================================================
> 
> Summary
> -------
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_17421_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_exec_suspend@basic-s3:
>     - shard-apl:          [PASS][1] -> [DMESG-WARN][2] ([i915#180] / [i915#95])
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-apl4/igt@gem_exec_suspend@basic-s3.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-apl4/igt@gem_exec_suspend@basic-s3.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-64x21-random:
>     - shard-skl:          [PASS][3] -> [FAIL][4] ([i915#54])
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen:
>     - shard-kbl:          [PASS][5] -> [FAIL][6] ([i915#54] / [i915#93] / [i915#95])
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html
> 
>   * igt@kms_cursor_crc@pipe-b-cursor-suspend:
>     - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +1 similar issue
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-apl7/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
> 
>   * igt@kms_cursor_legacy@pipe-b-torture-move:
>     - shard-tglb:         [PASS][9] -> [DMESG-WARN][10] ([i915#128])
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-tglb5/igt@kms_cursor_legacy@pipe-b-torture-move.html
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-tglb3/igt@kms_cursor_legacy@pipe-b-torture-move.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc:
>     - shard-skl:          [PASS][11] -> [FAIL][12] ([i915#49])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc.html
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc.html
> 
>   * igt@kms_hdr@bpc-switch-dpms:
>     - shard-skl:          [PASS][13] -> [FAIL][14] ([i915#1188])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl10/igt@kms_hdr@bpc-switch-dpms.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
>     - shard-kbl:          [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +3 similar issues
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
>     - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#108145] / [i915#265]) +1 similar issue
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
> 
>   * igt@kms_psr@no_drrs:
>     - shard-iclb:         [PASS][19] -> [FAIL][20] ([i915#173])
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-iclb8/igt@kms_psr@no_drrs.html
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-iclb1/igt@kms_psr@no_drrs.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_exec_balancer@bonded-slice:
>     - shard-kbl:          [FAIL][21] ([i915#1292] / [i915#93] / [i915#95]) -> [PASS][22]
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-kbl4/igt@gem_exec_balancer@bonded-slice.html
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-kbl3/igt@gem_exec_balancer@bonded-slice.html
> 
>   * igt@gem_exec_params@invalid-bsd-ring:
>     - shard-iclb:         [SKIP][23] ([fdo#109276]) -> [PASS][24]
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-iclb3/igt@gem_exec_params@invalid-bsd-ring.html
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-iclb1/igt@gem_exec_params@invalid-bsd-ring.html
> 
>   * igt@i915_selftest@live@hangcheck:
>     - shard-iclb:         [INCOMPLETE][25] ([i915#1580]) -> [PASS][26]
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-iclb5/igt@i915_selftest@live@hangcheck.html
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-iclb7/igt@i915_selftest@live@hangcheck.html
> 
>   * igt@kms_big_fb@x-tiled-16bpp-rotate-0:
>     - shard-glk:          [FAIL][27] ([i915#1119]) -> [PASS][28]
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-glk5/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-glk8/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html
> 
>   * igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-ytiled:
>     - shard-skl:          [FAIL][29] ([i915#52] / [i915#54]) -> [PASS][30]
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl3/igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-ytiled.html
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl8/igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-ytiled.html
> 
>   * {igt@kms_flip@flip-vs-expired-vblank@c-edp1}:
>     - shard-skl:          [FAIL][31] ([i915#79]) -> [PASS][32]
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
> 
>   * {igt@kms_flip@flip-vs-suspend-interruptible@a-dp1}:
>     - shard-apl:          [DMESG-WARN][33] ([i915#180]) -> [PASS][34]
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
> 
>   * {igt@kms_flip@flip-vs-suspend@c-dp1}:
>     - shard-kbl:          [DMESG-WARN][35] ([i915#180]) -> [PASS][36] +5 similar issues
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-kbl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
> 
>   * igt@kms_hdr@bpc-switch-suspend:
>     - shard-skl:          [FAIL][37] ([i915#1188]) -> [PASS][38] +1 similar issue
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl10/igt@kms_hdr@bpc-switch-suspend.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>     - shard-skl:          [FAIL][39] ([fdo#108145] / [i915#265]) -> [PASS][40]
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
> 
>   * igt@kms_psr@psr2_sprite_plane_move:
>     - shard-iclb:         [SKIP][41] ([fdo#109441]) -> [PASS][42] +1 similar issue
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
> 
>   * {igt@perf@blocking-parameterized}:
>     - shard-hsw:          [FAIL][43] ([i915#1542]) -> [PASS][44]
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-hsw6/igt@perf@blocking-parameterized.html
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-hsw7/igt@perf@blocking-parameterized.html
> 
>   
> #### Warnings ####
> 
>   * igt@i915_pm_dc@dc6-dpms:
>     - shard-tglb:         [FAIL][45] ([i915#454]) -> [SKIP][46] ([i915#468])
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-tglb1/igt@i915_pm_dc@dc6-dpms.html
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
> 
>   * igt@i915_pm_rpm@cursor-dpms:
>     - shard-snb:          [INCOMPLETE][47] ([i915#82]) -> [SKIP][48] ([fdo#109271])
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-snb6/igt@i915_pm_rpm@cursor-dpms.html
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-snb4/igt@i915_pm_rpm@cursor-dpms.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-suspend:
>     - shard-kbl:          [DMESG-WARN][49] ([i915#180]) -> [INCOMPLETE][50] ([i915#155])
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
> 
>   * igt@kms_setmode@basic:
>     - shard-apl:          [FAIL][51] ([i915#31] / [i915#95]) -> [FAIL][52] ([i915#31])
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8348/shard-apl4/igt@kms_setmode@basic.html
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/shard-apl8/igt@kms_setmode@basic.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [i915#1119]: https://gitlab.freedesktop.org/drm/intel/issues/1119
>   [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
>   [i915#128]: https://gitlab.freedesktop.org/drm/intel/issues/128
>   [i915#1292]: https://gitlab.freedesktop.org/drm/intel/issues/1292
>   [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
>   [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
>   [i915#1580]: https://gitlab.freedesktop.org/drm/intel/issues/1580
>   [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
>   [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
>   [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
>   [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
>   [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
>   [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
>   [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
>   [i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
>   [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
>   [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
>   [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
>   [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
>   [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
>   [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
>   [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
>   [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
> 
> 
> Participating hosts (10 -> 10)
> ------------------------------
> 
>   No changes in participating hosts
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * Linux: CI_DRM_8348 -> Patchwork_17421
> 
>   CI-20190529: 20190529
>   CI_DRM_8348: 71482e0c1b4ce12ad43e790a0c03d671caf1eb54 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_5604: 18cc19ece602ba552a8386222b49e7e82820f9aa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_17421: 12da9986f4100ffd21295150ec554834be924ad2 @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17421/index.html
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 721e9ba96d34..49998906cc61 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -20,8 +20,6 @@ 
 #include "intel_tc.h"
 #include "intel_vga.h"
 
-static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops;
-
 bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
 					 enum i915_power_well_id power_well_id);
 
@@ -328,30 +326,9 @@  aux_ch_to_digital_port(struct drm_i915_private *dev_priv,
 	return dig_port;
 }
 
-static bool tc_phy_aux_timeout_expected(struct drm_i915_private *dev_priv,
-					struct i915_power_well *power_well)
-{
-	/* An AUX timeout is expected if the TBT DP tunnel is down. */
-	if (power_well->desc->hsw.is_tc_tbt)
-		return true;
-
-	/*
-	 * An AUX timeout is expected because we enable TC legacy port aux
-	 * to hold port out of TC cold
-	 */
-	if (INTEL_GEN(dev_priv) == 11 &&
-	    power_well->desc->ops == &icl_tc_phy_aux_power_well_ops) {
-		enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
-		struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch);
-
-		return dig_port->tc_legacy_port;
-	}
-
-	return false;
-}
-
 static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
-					   struct i915_power_well *power_well)
+					   struct i915_power_well *power_well,
+					   bool timeout_expected)
 {
 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
 	int pw_idx = power_well->desc->hsw.idx;
@@ -362,8 +339,7 @@  static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
 		drm_dbg_kms(&dev_priv->drm, "%s power well enable timeout\n",
 			    power_well->desc->name);
 
-		drm_WARN_ON(&dev_priv->drm,
-			    !tc_phy_aux_timeout_expected(dev_priv, power_well));
+		drm_WARN_ON(&dev_priv->drm, !timeout_expected);
 
 	}
 }
@@ -422,8 +398,8 @@  static void gen9_wait_for_power_well_fuses(struct drm_i915_private *dev_priv,
 					  SKL_FUSE_PG_DIST_STATUS(pg), 1));
 }
 
-static void hsw_power_well_enable_prepare(struct drm_i915_private *dev_priv,
-					  struct i915_power_well *power_well)
+static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
+				  struct i915_power_well *power_well)
 {
 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
 	int pw_idx = power_well->desc->hsw.idx;
@@ -448,14 +424,8 @@  static void hsw_power_well_enable_prepare(struct drm_i915_private *dev_priv,
 	val = intel_de_read(dev_priv, regs->driver);
 	intel_de_write(dev_priv, regs->driver,
 		       val | HSW_PWR_WELL_CTL_REQ(pw_idx));
-}
 
-static void hsw_power_well_enable_complete(struct drm_i915_private *dev_priv,
-					   struct i915_power_well *power_well)
-{
-	int pw_idx = power_well->desc->hsw.idx;
-
-	hsw_wait_for_power_well_enable(dev_priv, power_well);
+	hsw_wait_for_power_well_enable(dev_priv, power_well, false);
 
 	/* Display WA #1178: cnl */
 	if (IS_CANNONLAKE(dev_priv) &&
@@ -481,13 +451,6 @@  static void hsw_power_well_enable_complete(struct drm_i915_private *dev_priv,
 				   power_well->desc->hsw.has_vga);
 }
 
-static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
-				  struct i915_power_well *power_well)
-{
-	hsw_power_well_enable_prepare(dev_priv, power_well);
-	hsw_power_well_enable_complete(dev_priv, power_well);
-}
-
 static void hsw_power_well_disable(struct drm_i915_private *dev_priv,
 				   struct i915_power_well *power_well)
 {
@@ -527,7 +490,7 @@  icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
 			       val | ICL_LANE_ENABLE_AUX);
 	}
 
-	hsw_wait_for_power_well_enable(dev_priv, power_well);
+	hsw_wait_for_power_well_enable(dev_priv, power_well, false);
 
 	/* Display WA #1178: icl */
 	if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
@@ -633,24 +596,37 @@  icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
 {
 	enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
 	struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch);
+	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
+	bool is_tbt = power_well->desc->hsw.is_tc_tbt;
+	bool timeout_expected;
 	u32 val;
 
 	icl_tc_port_assert_ref_held(dev_priv, power_well, dig_port);
 
 	val = intel_de_read(dev_priv, DP_AUX_CH_CTL(aux_ch));
 	val &= ~DP_AUX_CH_CTL_TBT_IO;
-	if (power_well->desc->hsw.is_tc_tbt)
+	if (is_tbt)
 		val |= DP_AUX_CH_CTL_TBT_IO;
 	intel_de_write(dev_priv, DP_AUX_CH_CTL(aux_ch), val);
 
-	hsw_power_well_enable_prepare(dev_priv, power_well);
+	val = intel_de_read(dev_priv, regs->driver);
+	intel_de_write(dev_priv, regs->driver,
+		       val | HSW_PWR_WELL_CTL_REQ(power_well->desc->hsw.idx));
 
-	if (INTEL_GEN(dev_priv) == 11 && dig_port->tc_legacy_port)
+	/*
+	 * An AUX timeout is expected if the TBT DP tunnel is down,
+	 * or need to enable AUX on a legacy TypeC port as part of the TC-cold
+	 * exit sequence.
+	 */
+	timeout_expected = is_tbt;
+	if (INTEL_GEN(dev_priv) == 11 && dig_port->tc_legacy_port) {
 		icl_tc_cold_exit(dev_priv);
+		timeout_expected = true;
+	}
 
-	hsw_power_well_enable_complete(dev_priv, power_well);
+	hsw_wait_for_power_well_enable(dev_priv, power_well, timeout_expected);
 
-	if (INTEL_GEN(dev_priv) >= 12 && !power_well->desc->hsw.is_tc_tbt) {
+	if (INTEL_GEN(dev_priv) >= 12 && !is_tbt) {
 		enum tc_port tc_port;
 
 		tc_port = TGL_AUX_PW_TO_TC_PORT(power_well->desc->hsw.idx);