diff mbox series

[kvm-unit-tests,v6,01/10] s390x: saving regs for interrupts

Message ID 1587725152-25569-2-git-send-email-pmorel@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series s390x: Testing the Channel Subsystem I/O | expand

Commit Message

Pierre Morel April 24, 2020, 10:45 a.m. UTC
If we use multiple source of interrupts, for example, using SCLP
console to print information while using I/O interrupts, we need
to have a re-entrant register saving interruption handling.

Instead of saving at a static memory address, let's save the base
registers and the floating point registers on the stack.

Note that we keep the static register saving to recover from the
RESET tests.

Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
---
 s390x/cstart64.S | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

Comments

David Hildenbrand April 27, 2020, 8:59 a.m. UTC | #1
On 24.04.20 12:45, Pierre Morel wrote:
> If we use multiple source of interrupts, for example, using SCLP
> console to print information while using I/O interrupts, we need
> to have a re-entrant register saving interruption handling.

So the primary reason is to print during I/O interrupts (which we
already do, but usually never trigger - handle_io_int())

> 
> Instead of saving at a static memory address, let's save the base
> registers and the floating point registers on the stack.

".. in case of I/O interrupts".

> 
> Note that we keep the static register saving to recover from the
> RESET tests.

and for all other types of interrupts.

> 
> Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
> ---
>  s390x/cstart64.S | 34 ++++++++++++++++++++++++++++++++--
>  1 file changed, 32 insertions(+), 2 deletions(-)
> 
> diff --git a/s390x/cstart64.S b/s390x/cstart64.S
> index 9af6bb3..ba2e67c 100644
> --- a/s390x/cstart64.S
> +++ b/s390x/cstart64.S
> @@ -118,6 +118,36 @@ memsetxc:
>  	lmg	%r0, %r15, GEN_LC_SW_INT_GRS
>  	.endm
>  
> +/* Save registers on the stack (r15), so we can have stacked interrupts. */
> +	.macro SAVE_IRQ_REGS

s/SAVE_IRQ_REGS/SAVE_REGS_STACK/ ?

Same for the other macro.

> +	/* Allocate a stack frame for 15 integer registers */

not integers. sizeof(int) == 4.

"doublewords" should be the right s390x speak.

> +	slgfi   %r15, 15 * 8
> +	/* Store all registers from r0 to r14 on the stack */
> +	stmg    %r0, %r14, 0(%r15)
> +	/* Allocate a stack frame for 16 floating point registers */
> +	/* The size of a FP register is the size of an integer */
> +	slgfi   %r15, 16 * 8
> +	/* Save fp register on stack: offset to SP is multiple of reg number */
> +	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
> +	std	\i, \i * 8(%r15)
> +	.endr
> +	.endm

What about the FPC?

> +
> +/* Restore the register in reverse order */
> +	.macro RESTORE_IRQ_REGS
> +	/* Restore fp register from stack: SP still where it was left */
> +	/* and offset to SP is a multile of reg number */
> +	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
> +	ld	\i, \i * 8(%r15)
> +	.endr
> +	/* Now it is done, rewind the stack pointer by 16 integers */
> +	algfi   %r15, 16 * 8
> +	/* Load the registers from stack */
> +	lmg     %r0, %r14, 0(%r15)
> +	/* Rewind the stack by 15 integers */
> +	algfi   %r15, 15 * 8
> +	.endm

Dito, FPC?

> +
>  .section .text
>  /*
>   * load_reset calling convention:
> @@ -182,9 +212,9 @@ mcck_int:
>  	lpswe	GEN_LC_MCCK_OLD_PSW
>  
>  io_int:
> -	SAVE_REGS
> +	SAVE_IRQ_REGS
>  	brasl	%r14, handle_io_int
> -	RESTORE_REGS
> +	RESTORE_IRQ_REGS
>  	lpswe	GEN_LC_IO_OLD_PSW
>  
>  svc_int:
>
Pierre Morel April 27, 2020, 10:50 a.m. UTC | #2
On 2020-04-27 10:59, David Hildenbrand wrote:
> On 24.04.20 12:45, Pierre Morel wrote:
>> If we use multiple source of interrupts, for example, using SCLP
>> console to print information while using I/O interrupts, we need
>> to have a re-entrant register saving interruption handling.
> 
> So the primary reason is to print during I/O interrupts (which we
> already do, but usually never trigger - handle_io_int())
> 
>>
>> Instead of saving at a static memory address, let's save the base
>> registers and the floating point registers on the stack.
> 
> ".. in case of I/O interrupts".

OK

> 
>>
>> Note that we keep the static register saving to recover from the
>> RESET tests.
> 
> and for all other types of interrupts.

OK

> 
>>
>> Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
>> ---
>>   s390x/cstart64.S | 34 ++++++++++++++++++++++++++++++++--
>>   1 file changed, 32 insertions(+), 2 deletions(-)
>>
>> diff --git a/s390x/cstart64.S b/s390x/cstart64.S
>> index 9af6bb3..ba2e67c 100644
>> --- a/s390x/cstart64.S
>> +++ b/s390x/cstart64.S
>> @@ -118,6 +118,36 @@ memsetxc:
>>   	lmg	%r0, %r15, GEN_LC_SW_INT_GRS
>>   	.endm
>>   
>> +/* Save registers on the stack (r15), so we can have stacked interrupts. */
>> +	.macro SAVE_IRQ_REGS
> 
> s/SAVE_IRQ_REGS/SAVE_REGS_STACK/ ?
> 
> Same for the other macro.

OK

> 
>> +	/* Allocate a stack frame for 15 integer registers */
> 
> not integers. sizeof(int) == 4.

hum, yes, I just do not know from where I took the word "integer" here!.

> 
> "doublewords" should be the right s390x speak.

in fact they are named general registers in the POP.
(which indeed are doublewords :) )


> 
>> +	slgfi   %r15, 15 * 8
>> +	/* Store all registers from r0 to r14 on the stack */
>> +	stmg    %r0, %r14, 0(%r15)
>> +	/* Allocate a stack frame for 16 floating point registers */
>> +	/* The size of a FP register is the size of an integer */
>> +	slgfi   %r15, 16 * 8
>> +	/* Save fp register on stack: offset to SP is multiple of reg number */
>> +	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
>> +	std	\i, \i * 8(%r15)
>> +	.endr
>> +	.endm
> 
> What about the FPC?

Seems I forgot it.
I will update.
Thanks.

Regards,
Pierre
diff mbox series

Patch

diff --git a/s390x/cstart64.S b/s390x/cstart64.S
index 9af6bb3..ba2e67c 100644
--- a/s390x/cstart64.S
+++ b/s390x/cstart64.S
@@ -118,6 +118,36 @@  memsetxc:
 	lmg	%r0, %r15, GEN_LC_SW_INT_GRS
 	.endm
 
+/* Save registers on the stack (r15), so we can have stacked interrupts. */
+	.macro SAVE_IRQ_REGS
+	/* Allocate a stack frame for 15 integer registers */
+	slgfi   %r15, 15 * 8
+	/* Store all registers from r0 to r14 on the stack */
+	stmg    %r0, %r14, 0(%r15)
+	/* Allocate a stack frame for 16 floating point registers */
+	/* The size of a FP register is the size of an integer */
+	slgfi   %r15, 16 * 8
+	/* Save fp register on stack: offset to SP is multiple of reg number */
+	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	std	\i, \i * 8(%r15)
+	.endr
+	.endm
+
+/* Restore the register in reverse order */
+	.macro RESTORE_IRQ_REGS
+	/* Restore fp register from stack: SP still where it was left */
+	/* and offset to SP is a multile of reg number */
+	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+	ld	\i, \i * 8(%r15)
+	.endr
+	/* Now it is done, rewind the stack pointer by 16 integers */
+	algfi   %r15, 16 * 8
+	/* Load the registers from stack */
+	lmg     %r0, %r14, 0(%r15)
+	/* Rewind the stack by 15 integers */
+	algfi   %r15, 15 * 8
+	.endm
+
 .section .text
 /*
  * load_reset calling convention:
@@ -182,9 +212,9 @@  mcck_int:
 	lpswe	GEN_LC_MCCK_OLD_PSW
 
 io_int:
-	SAVE_REGS
+	SAVE_IRQ_REGS
 	brasl	%r14, handle_io_int
-	RESTORE_REGS
+	RESTORE_IRQ_REGS
 	lpswe	GEN_LC_IO_OLD_PSW
 
 svc_int: