| Message ID | 20200501170748.358135-5-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce Rocket Lake | expand |
> -----Original Message----- > From: Roper, Matthew D <matthew.d.roper@intel.com> > Sent: Friday, May 1, 2020 10:37 PM > To: intel-gfx@lists.freedesktop.org > Cc: Roper, Matthew D <matthew.d.roper@intel.com>; Srivatsa, Anusha > <anusha.srivatsa@intel.com> > Subject: [PATCH 04/23] drm/i915/rkl: Load DMC firmware for Rocket Lake > > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/display/intel_csr.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_csr.c > b/drivers/gpu/drm/i915/display/intel_csr.c > index 3112572cfb7d..319932b03e88 100644 > --- a/drivers/gpu/drm/i915/display/intel_csr.c > +++ b/drivers/gpu/drm/i915/display/intel_csr.c > @@ -40,6 +40,10 @@ > > #define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE > > +#define RKL_CSR_PATH "i915/rkl_dmc_ver2_01.bin" > +#define RKL_CSR_VERSION_REQUIRED CSR_VERSION(2, 1) > +MODULE_FIRMWARE(RKL_CSR_PATH); > + > #define TGL_CSR_PATH "i915/tgl_dmc_ver2_06.bin" > #define TGL_CSR_VERSION_REQUIRED CSR_VERSION(2, 6) > #define TGL_CSR_MAX_FW_SIZE 0x6000 > @@ -682,7 +686,11 @@ void intel_csr_ucode_init(struct drm_i915_private > *dev_priv) > */ > intel_csr_runtime_pm_get(dev_priv); > > - if (INTEL_GEN(dev_priv) >= 12) { > + if (IS_ROCKETLAKE(dev_priv)) { > + csr->fw_path = RKL_CSR_PATH; > + csr->required_version = RKL_CSR_VERSION_REQUIRED; > + csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE; > + } else if (INTEL_GEN(dev_priv) >= 12) { > csr->fw_path = TGL_CSR_PATH; > csr->required_version = TGL_CSR_VERSION_REQUIRED; > /* Allow to load fw via parameter using the last known size */ > -- > 2.24.1
diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c index 3112572cfb7d..319932b03e88 100644 --- a/drivers/gpu/drm/i915/display/intel_csr.c +++ b/drivers/gpu/drm/i915/display/intel_csr.c @@ -40,6 +40,10 @@ #define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE +#define RKL_CSR_PATH "i915/rkl_dmc_ver2_01.bin" +#define RKL_CSR_VERSION_REQUIRED CSR_VERSION(2, 1) +MODULE_FIRMWARE(RKL_CSR_PATH); + #define TGL_CSR_PATH "i915/tgl_dmc_ver2_06.bin" #define TGL_CSR_VERSION_REQUIRED CSR_VERSION(2, 6) #define TGL_CSR_MAX_FW_SIZE 0x6000 @@ -682,7 +686,11 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) */ intel_csr_runtime_pm_get(dev_priv); - if (INTEL_GEN(dev_priv) >= 12) { + if (IS_ROCKETLAKE(dev_priv)) { + csr->fw_path = RKL_CSR_PATH; + csr->required_version = RKL_CSR_VERSION_REQUIRED; + csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE; + } else if (INTEL_GEN(dev_priv) >= 12) { csr->fw_path = TGL_CSR_PATH; csr->required_version = TGL_CSR_VERSION_REQUIRED; /* Allow to load fw via parameter using the last known size */
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/display/intel_csr.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)