| Message ID | 20200513071344.5430-2-frank.wang@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add Rockchip RK3399 USB3.0 Host support | expand |
On 2020/5/13 下午3:13, Frank Wang wrote: > From: Jagan Teki <jagan@amarulasolutions.com> > > Enable/Disable the USB2PHY clk for rk3399. > > CLK is clear in enable and set in disable functionality. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c > index 5fb72d83c2..b53f2f984e 100644 > --- a/drivers/clk/rockchip/clk_rk3399.c > +++ b/drivers/clk/rockchip/clk_rk3399.c > @@ -1091,6 +1091,12 @@ static int rk3399_clk_enable(struct clk *clk) > case SCLK_MACREF_OUT: > rk_clrreg(&priv->cru->clkgate_con[5], BIT(6)); > break; > + case SCLK_USB2PHY0_REF: > + rk_clrreg(&priv->cru->clkgate_con[6], BIT(5)); > + break; > + case SCLK_USB2PHY1_REF: > + rk_clrreg(&priv->cru->clkgate_con[6], BIT(6)); > + break; > case ACLK_GMAC: > rk_clrreg(&priv->cru->clkgate_con[32], BIT(0)); > break; > @@ -1167,6 +1173,12 @@ static int rk3399_clk_disable(struct clk *clk) > case SCLK_MACREF_OUT: > rk_setreg(&priv->cru->clkgate_con[5], BIT(6)); > break; > + case SCLK_USB2PHY0_REF: > + rk_setreg(&priv->cru->clkgate_con[6], BIT(5)); > + break; > + case SCLK_USB2PHY1_REF: > + rk_setreg(&priv->cru->clkgate_con[6], BIT(6)); > + break; > case ACLK_GMAC: > rk_setreg(&priv->cru->clkgate_con[32], BIT(0)); > break;
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 5fb72d83c2..b53f2f984e 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1091,6 +1091,12 @@ static int rk3399_clk_enable(struct clk *clk) case SCLK_MACREF_OUT: rk_clrreg(&priv->cru->clkgate_con[5], BIT(6)); break; + case SCLK_USB2PHY0_REF: + rk_clrreg(&priv->cru->clkgate_con[6], BIT(5)); + break; + case SCLK_USB2PHY1_REF: + rk_clrreg(&priv->cru->clkgate_con[6], BIT(6)); + break; case ACLK_GMAC: rk_clrreg(&priv->cru->clkgate_con[32], BIT(0)); break; @@ -1167,6 +1173,12 @@ static int rk3399_clk_disable(struct clk *clk) case SCLK_MACREF_OUT: rk_setreg(&priv->cru->clkgate_con[5], BIT(6)); break; + case SCLK_USB2PHY0_REF: + rk_setreg(&priv->cru->clkgate_con[6], BIT(5)); + break; + case SCLK_USB2PHY1_REF: + rk_setreg(&priv->cru->clkgate_con[6], BIT(6)); + break; case ACLK_GMAC: rk_setreg(&priv->cru->clkgate_con[32], BIT(0)); break;