diff mbox series

[2/2] ARM: dts: imx6sl: Use nvmem interface to get fuse data

Message ID 1589418528-26410-2-git-send-email-Anson.Huang@nxp.com (mailing list archive)
State Mainlined
Commit d7e1c2b081b08dbcd8717613407dd9f99f3b9c0f
Headers show
Series [1/2] ARM: dts: imx6qdl: Use nvmem interface to get fuse data | expand

Commit Message

Anson Huang May 14, 2020, 1:08 a.m. UTC
Although ocotp clock is always ON for i.MX6SL, OCOTP can be
accessed directly, but since i.MX6SL nvmem interface is supported,
and fsl,tempmon-data is deprecated, use it instead of getting fuse
data by reading ocotp directly, this makes all i.MX6 SoCs aligned.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/imx6sl.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

Comments

Dong Aisheng May 18, 2020, 8:45 a.m. UTC | #1
> From: Anson Huang <Anson.Huang@nxp.com>
> Sent: Thursday, May 14, 2020 9:09 AM
> 
> Although ocotp clock is always ON for i.MX6SL, OCOTP can be accessed directly,
> but since i.MX6SL nvmem interface is supported, and fsl,tempmon-data is
> deprecated, use it instead of getting fuse data by reading ocotp directly, this
> makes all i.MX6 SoCs aligned.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>

Regards
Aisheng
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 8230b45..fcb84fe 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -98,7 +98,8 @@ 
 		interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-parent = <&gpc>;
 		fsl,tempmon = <&anatop>;
-		fsl,tempmon-data = <&ocotp>;
+		nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
+		nvmem-cell-names = "calib", "temp_grade";
 		clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
 	};
 
@@ -961,6 +962,14 @@ 
 				cpu_speed_grade: speed-grade@10 {
 					reg = <0x10 4>;
 				};
+
+				tempmon_calib: calib@38 {
+					reg = <0x38 4>;
+				};
+
+				tempmon_temp_grade: temp-grade@20 {
+					reg = <0x20 4>;
+				};
 			};
 
 			audmux: audmux@21d8000 {