diff mbox series

drm/i915/selftests: Keep rps pinned during time critical tests

Message ID 20200515194655.3611-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series drm/i915/selftests: Keep rps pinned during time critical tests | expand

Commit Message

Chris Wilson May 15, 2020, 7:46 p.m. UTC
The timeslice queue tries to complete a round-robin discovery of a deep
and pathological semaphore chain within a certain time limit. It helps
if we can keep RPS pinned during this so that we do not waste time on a
slow GPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/selftest_lrc.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 824f99c4cc7c..9edb0eb02e90 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -1197,6 +1197,8 @@  static int live_timeslice_queue(void *arg)
 	if (err)
 		goto err_pin;
 
+	atomic_inc(&gt->rps.num_waiters); /* keep rps pinned */
+	intel_gt_pm_get(gt);
 	for_each_engine(engine, gt, id) {
 		struct i915_sched_attr attr = {
 			.priority = I915_USER_PRIORITY(I915_PRIORITY_MAX),
@@ -1288,6 +1290,8 @@  static int live_timeslice_queue(void *arg)
 		if (err)
 			break;
 	}
+	intel_gt_pm_put(gt);
+	atomic_dec(&gt->rps.num_waiters);
 
 err_pin:
 	i915_vma_unpin(vma);