[RFC,v5,1/6] dt-bindings: exynos-bus: Add documentation for interconnect properties
diff mbox series

Message ID 20200529163200.18031-2-s.nawrocki@samsung.com
State Superseded
Headers show
Series
  • Exynos: Simple QoS for exynos-bus using interconnect
Related show

Commit Message

Sylwester Nawrocki May 29, 2020, 4:31 p.m. UTC
Add documentation for new optional properties in the exynos bus nodes:
samsung,interconnect-parent, #interconnect-cells.
These properties allow to specify the SoC interconnect structure which
then allows the interconnect consumer devices to request specific
bandwidth requirements.

Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
Changes for v5:
 - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
---
 Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

--
2.7.4

Comments

Chanwoo Choi May 31, 2020, 12:01 a.m. UTC | #1
Hi Sylwester,


On Sat, May 30, 2020 at 1:32 AM Sylwester Nawrocki
<s.nawrocki@samsung.com> wrote:
>
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells.
> These properties allow to specify the SoC interconnect structure which
> then allows the interconnect consumer devices to request specific
> bandwidth requirements.
>
> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v5:
>  - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
> ---
>  Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> index e71f752..e0d2daa 100644
> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> @@ -51,6 +51,11 @@ Optional properties only for parent bus device:
>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>                         the performance count against total cycle count.
>
> +Optional properties for interconnect functionality (QoS frequency constraints):
> +- samsung,interconnect-parent: phandle to the parent interconnect node; for
> +  passive devices should point to same node as the exynos,parent-bus property.
> +- #interconnect-cells: should be 0
> +
>  Detailed correlation between sub-blocks and power line according to Exynos SoC:
>  - In case of Exynos3250, there are two power line as following:
>         VDD_MIF |--- DMC
> @@ -185,8 +190,9 @@ Example1:
>         ----------------------------------------------------------
>
>  Example2 :
> -       The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
> -       is listed below:
> +       The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is
> +       listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc"
> +       is defined for demonstration purposes.
>
>         bus_dmc: bus_dmc {
>                 compatible = "samsung,exynos-bus";
> @@ -376,12 +382,15 @@ Example2 :
>         &bus_dmc {
>                 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
>                 vdd-supply = <&buck1_reg>;      /* VDD_MIF */
> +               #interconnect-cells = <0>;
>                 status = "okay";
>         };
>
>         &bus_leftbus {
>                 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>                 vdd-supply = <&buck3_reg>;
> +               samsung,interconnect-parent = <&bus_dmc>;
> +               #interconnect-cells = <0>;
>                 status = "okay";
>         };
>
> @@ -392,6 +401,8 @@ Example2 :
>
>         &bus_lcd0 {
>                 devfreq = <&bus_leftbus>;
> +               samsung,interconnect-parent = <&bus_leftbus>;
> +               #interconnect-cells = <0>;
>                 status = "okay";
>         };
>
> --
> 2.7.4
>

If you add the usage example like the mixer device of patch5 to this
dt-binding document,
I think it is very beneficial and more helpful for user of
exynos-bus/exynos-generic-icc.

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

--
Best Regards,
Chanwoo Choi
Samsung Electronics
Sylwester Nawrocki June 1, 2020, 8:19 a.m. UTC | #2
Cc: Rob, devicetree ML

On 29.05.2020 18:31, Sylwester Nawrocki wrote:
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells.
> These properties allow to specify the SoC interconnect structure which
> then allows the interconnect consumer devices to request specific
> bandwidth requirements.
> 
> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v5:
>  - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
> ---
>  Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> index e71f752..e0d2daa 100644
> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> @@ -51,6 +51,11 @@ Optional properties only for parent bus device:
>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>  			the performance count against total cycle count.
> 
> +Optional properties for interconnect functionality (QoS frequency constraints):
> +- samsung,interconnect-parent: phandle to the parent interconnect node; for
> +  passive devices should point to same node as the exynos,parent-bus property.
> +- #interconnect-cells: should be 0
> +
>  Detailed correlation between sub-blocks and power line according to Exynos SoC:
>  - In case of Exynos3250, there are two power line as following:
>  	VDD_MIF |--- DMC
> @@ -185,8 +190,9 @@ Example1:
>  	----------------------------------------------------------
> 
>  Example2 :
> -	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
> -	is listed below:
> +	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is
> +	listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc"
> +	is defined for demonstration purposes.
> 
>  	bus_dmc: bus_dmc {
>  		compatible = "samsung,exynos-bus";
> @@ -376,12 +382,15 @@ Example2 :
>  	&bus_dmc {
>  		devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
>  		vdd-supply = <&buck1_reg>;	/* VDD_MIF */
> +		#interconnect-cells = <0>;
>  		status = "okay";
>  	};
> 
>  	&bus_leftbus {
>  		devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>  		vdd-supply = <&buck3_reg>;
> +		samsung,interconnect-parent = <&bus_dmc>;
> +		#interconnect-cells = <0>;
>  		status = "okay";
>  	};
> 
> @@ -392,6 +401,8 @@ Example2 :
> 
>  	&bus_lcd0 {
>  		devfreq = <&bus_leftbus>;
> +		samsung,interconnect-parent = <&bus_leftbus>;
> +		#interconnect-cells = <0>;
>  		status = "okay";
>  	};
> 
> --
> 2.7.4
Sylwester Nawrocki June 1, 2020, 9:40 a.m. UTC | #3
Hi Chanwoo,

On 31.05.2020 02:01, Chanwoo Choi wrote:
> On Sat, May 30, 2020 at 1:32 AM Sylwester Nawrocki
> <s.nawrocki@samsung.com> wrote:
>>
>> Add documentation for new optional properties in the exynos bus nodes:
>> samsung,interconnect-parent, #interconnect-cells.
>> These properties allow to specify the SoC interconnect structure which
>> then allows the interconnect consumer devices to request specific
>> bandwidth requirements.
>>
>> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> ---
>> Changes for v5:
>>  - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
>> ---
>>  Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
>>  1 file changed, 13 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> index e71f752..e0d2daa 100644
>> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> @@ -51,6 +51,11 @@ Optional properties only for parent bus device:
>>  - exynos,saturation-ratio: the percentage value which is used to calibrate
>>                         the performance count against total cycle count.
>>
>> +Optional properties for interconnect functionality (QoS frequency constraints):
>> +- samsung,interconnect-parent: phandle to the parent interconnect node; for
>> +  passive devices should point to same node as the exynos,parent-bus property.
>> +- #interconnect-cells: should be 0
>> +
>>  Detailed correlation between sub-blocks and power line according to Exynos SoC:
>>  - In case of Exynos3250, there are two power line as following:
>>         VDD_MIF |--- DMC
>> @@ -185,8 +190,9 @@ Example1:
>>         ----------------------------------------------------------
>>
>>  Example2 :
>> -       The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
>> -       is listed below:
>> +       The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is
>> +       listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc"
>> +       is defined for demonstration purposes.
>>
>>         bus_dmc: bus_dmc {
>>                 compatible = "samsung,exynos-bus";
>> @@ -376,12 +382,15 @@ Example2 :
>>         &bus_dmc {
>>                 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
>>                 vdd-supply = <&buck1_reg>;      /* VDD_MIF */
>> +               #interconnect-cells = <0>;
>>                 status = "okay";
>>         };
>>
>>         &bus_leftbus {
>>                 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>>                 vdd-supply = <&buck3_reg>;
>> +               samsung,interconnect-parent = <&bus_dmc>;
>> +               #interconnect-cells = <0>;
>>                 status = "okay";
>>         };
>>
>> @@ -392,6 +401,8 @@ Example2 :
>>
>>         &bus_lcd0 {
>>                 devfreq = <&bus_leftbus>;
>> +               samsung,interconnect-parent = <&bus_leftbus>;
>> +               #interconnect-cells = <0>;
>>                 status = "okay";
>>         };
>>
>> --
>> 2.7.4
>>
> 
> If you add the usage example like the mixer device of patch5 to this
> dt-binding document,
> I think it is very beneficial and more helpful for user of
> exynos-bus/exynos-generic-icc.
> 
> Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

Thanks for review. I will make sure the example includes a consumer
in next version. Will also mention ../interconnect/interconnect.txt
in description of the #interconnect-cells property.
Krzysztof Kozlowski June 2, 2020, 8:05 a.m. UTC | #4
On Fri, May 29, 2020 at 06:31:55PM +0200, Sylwester Nawrocki wrote:
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells.
> These properties allow to specify the SoC interconnect structure which
> then allows the interconnect consumer devices to request specific
> bandwidth requirements.
> 
> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v5:
>  - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
> ---
>  Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index e71f752..e0d2daa 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -51,6 +51,11 @@  Optional properties only for parent bus device:
 - exynos,saturation-ratio: the percentage value which is used to calibrate
 			the performance count against total cycle count.

+Optional properties for interconnect functionality (QoS frequency constraints):
+- samsung,interconnect-parent: phandle to the parent interconnect node; for
+  passive devices should point to same node as the exynos,parent-bus property.
+- #interconnect-cells: should be 0
+
 Detailed correlation between sub-blocks and power line according to Exynos SoC:
 - In case of Exynos3250, there are two power line as following:
 	VDD_MIF |--- DMC
@@ -185,8 +190,9 @@  Example1:
 	----------------------------------------------------------

 Example2 :
-	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
-	is listed below:
+	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is
+	listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc"
+	is defined for demonstration purposes.

 	bus_dmc: bus_dmc {
 		compatible = "samsung,exynos-bus";
@@ -376,12 +382,15 @@  Example2 :
 	&bus_dmc {
 		devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
 		vdd-supply = <&buck1_reg>;	/* VDD_MIF */
+		#interconnect-cells = <0>;
 		status = "okay";
 	};

 	&bus_leftbus {
 		devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
 		vdd-supply = <&buck3_reg>;
+		samsung,interconnect-parent = <&bus_dmc>;
+		#interconnect-cells = <0>;
 		status = "okay";
 	};

@@ -392,6 +401,8 @@  Example2 :

 	&bus_lcd0 {
 		devfreq = <&bus_leftbus>;
+		samsung,interconnect-parent = <&bus_leftbus>;
+		#interconnect-cells = <0>;
 		status = "okay";
 	};