[3/4] arm64: dts: Adjust msm8992 DTS to use the correct GCC driver

Commit Message

Konrad Dybcio May 31, 2020, 5:46 p.m. UTC

This commit adds the necessary includes and corrects the
compatible string for the msm8992 GCC driver. It also
renames "clock_gcc" to "gcc" to follow the style used in
other device trees.

Signed-off-by: Konrad Dybcio <[e-mail]>
---
 arch/arm64/boot/dts/qcom/msm8992.dtsi | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 81fed16fcee6..7f618f6183d8 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -3,7 +3,8 @@ 
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/qcom,gcc-msm8994.h>
+#include <dt-bindings/clock/qcom,gcc-msm8992.h>
+#include <dt-bindings/reset/qcom,gcc-msm8992.h>
 
 / {
 	model = "Qualcomm Technologies, Inc. MSM 8992";
@@ -275,8 +276,8 @@  blsp1_uart2: serial@f991e000 {
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>;
 			status = "disabled";
 			clock-names = "core", "iface";
-			clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
-				<&clock_gcc GCC_BLSP1_AHB_CLK>;
+			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+				<&gcc GCC_BLSP1_AHB_CLK>;
 		};
 
 		blsp2_uart2: serial@f995e000 {
@@ -289,8 +290,8 @@  blsp2_uart2: serial@f995e000 {
 				<&gcc GCC_BLSP2_AHB_CLK>;
 		};
 
-		clock_gcc: clock-controller@fc400000 {
-			compatible = "qcom,gcc-msm8994";
+		gcc: clock-controller@fc400000 {
+			compatible = "qcom,gcc-msm8992";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
@@ -306,8 +307,8 @@  sdhci1: mmc@f9824900 {
 					<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "hc_irq", "pwr_irq";
 
-			clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
-				<&clock_gcc GCC_SDCC1_AHB_CLK>;
+			clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+				<&gcc GCC_SDCC1_AHB_CLK>;
 			clock-names = "core", "iface";
 
 			pinctrl-names = "default", "sleep";