drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
diff mbox series

Message ID 20200601161942.30854-1-chris@chris-wilson.co.uk
State New
Headers show
Series
  • drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
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Commit Message

Chris Wilson June 1, 2020, 4:19 p.m. UTC
Allow batch buffers to read their own _local_ cumulative HW runtime of
their logical context.

Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v5.4+
---
 drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Mika Kuoppala June 1, 2020, 6:23 p.m. UTC | #1
Chris Wilson <chris@chris-wilson.co.uk> writes:

> Allow batch buffers to read their own _local_ cumulative HW runtime of
> their logical context.
>
> Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v5.4+

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 189b573d02be..372354d33f55 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
>  #define REG32(_reg, ...) \
>  	{ .addr = (_reg), __VA_ARGS__ }
>  
> +#define REG32_IDX(_reg, idx) \
> +	{ .addr = _reg(idx) }
> +
>  /*
>   * Convenience macro for adding 64-bit registers.
>   *
> @@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
>  	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
>  	REG32(BCS_SWCTRL),
>  	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
> +	REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
>  	REG64_IDX(BCS_GPR, 0),
>  	REG64_IDX(BCS_GPR, 1),
>  	REG64_IDX(BCS_GPR, 2),
> -- 
> 2.20.1

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 189b573d02be..372354d33f55 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -572,6 +572,9 @@  struct drm_i915_reg_descriptor {
 #define REG32(_reg, ...) \
 	{ .addr = (_reg), __VA_ARGS__ }
 
+#define REG32_IDX(_reg, idx) \
+	{ .addr = _reg(idx) }
+
 /*
  * Convenience macro for adding 64-bit registers.
  *
@@ -669,6 +672,7 @@  static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
 	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
 	REG32(BCS_SWCTRL),
 	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
+	REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
 	REG64_IDX(BCS_GPR, 0),
 	REG64_IDX(BCS_GPR, 1),
 	REG64_IDX(BCS_GPR, 2),