[2/3] drm/i915/gt: Set timeslicing priority from queue
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Message ID 20200601203550.19192-2-chris@chris-wilson.co.uk
State New
Headers show
  • [1/3] drm/i915: Trim set_timer_ms() intervals
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Commit Message

Chris Wilson June 1, 2020, 8:35 p.m. UTC
If we only submit the first port, leaving the second empty yet have
ready requests pending in the queue, use that to set the timeslicing
priority (i.e. the priority at which we will decided to enabling
timeslicing and evict the currently active context if the queue is of
equal priority after its quantum expired).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
 drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff mbox series

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 6fc0966b75ff..7a3c55e3ad9d 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1962,7 +1962,7 @@  static int
 switch_prio(struct intel_engine_cs *engine, const struct i915_request *rq)
 	if (list_is_last(&rq->sched.link, &engine->active.requests))
-		return INT_MIN;
+		return engine->execlists.queue_priority_hint;
 	return rq_prio(list_next_entry(rq, sched.link));