| Message ID | 20200603194308.78622-3-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/3] drm/i915/bios: Parse HOBL parameter | expand |
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 88f366bb28d7..13f7bc0a4bc0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -119,7 +119,7 @@ intel_dp_reset_link_train(struct intel_dp *intel_dp, u8 dp_train_pat) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.hobl) + if (HAS_HOBL(dev_priv) && intel_dp_is_edp(intel_dp)) intel_dp->try_hobl = true; memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
HOBL worked in my TGL RVP even without the necessary HW support, also it worked in more than half of the TGL machines in CI so it is worthy to enable it by default. Even if link training fails with this new vswing table it will only cause one additional link training, that is worthy the try to get the additional power-savings. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)