From patchwork Tue Jun 9 17:49:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne X-Patchwork-Id: 11596403 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8247314E3 for ; Tue, 9 Jun 2020 18:16:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6EAA8206C3 for ; Tue, 9 Jun 2020 18:16:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388787AbgFISQc (ORCPT ); Tue, 9 Jun 2020 14:16:32 -0400 Received: from mx2.suse.de ([195.135.220.15]:36804 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730674AbgFIRuX (ORCPT ); Tue, 9 Jun 2020 13:50:23 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 7E5A5B198; Tue, 9 Jun 2020 17:50:25 +0000 (UTC) From: Nicolas Saenz Julienne To: f.fainelli@gmail.com, gregkh@linuxfoundation.org, wahrenst@gmx.net, p.zabel@pengutronix.de, linux-kernel@vger.kernel.org, Rob Herring , Nicolas Saenz Julienne Cc: linux-usb@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, tim.gover@raspberrypi.org, linux-pci@vger.kernel.org, helgaas@kernel.org, andy.shevchenko@gmail.com, mathias.nyman@linux.intel.com, lorenzo.pieralisi@arm.com, devicetree@vger.kernel.org Subject: [PATCH v2 4/9] ARM: dts: bcm2711: Add reset controller to xHCI node Date: Tue, 9 Jun 2020 19:49:57 +0200 Message-Id: <20200609175003.19793-5-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200609175003.19793-1-nsaenzjulienne@suse.de> References: <20200609175003.19793-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The chip is hardwired to the board's PCIe bus and needs to be properly setup trough a firmware routine after a PCI fundamental reset. Pass the reset controller phandle that takes care of triggering the initialization to the relevant PCI device. Signed-off-by: Nicolas Saenz Julienne Reviewed-by: Florian Fainelli --- Changes since v1: - Update to match new binding arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts index 0cef95058fb0..e74ca0c86137 100644 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts @@ -207,6 +207,13 @@ phy1: ethernet-phy@1 { }; }; +&pcie0 { + usb@1,0 { + reg = <0 0 0 0 0>; + resets = <&reset 0>; + }; +}; + /* uart0 communicates with the BT module */ &uart0 { pinctrl-names = "default";