diff mbox series

[v12,01/11] perf/x86: Fix variable types for LBR registers

Message ID 20200613080958.132489-2-like.xu@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Guest Last Branch Recording Enabling | expand

Commit Message

Like Xu June 13, 2020, 8:09 a.m. UTC 
From: Wei Wang <wei.w.wang@intel.com>

The MSR variable type can be 'unsigned int', which uses less memory than
the longer 'unsigned long'. Fix 'struct x86_pmu' for that. The lbr_nr won't
be a negative number, so make it 'unsigned int' as well.

Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
---
 arch/x86/events/perf_event.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Andi Kleen Nov. 9, 2020, 6:34 a.m. UTC | #1 
On Sat, Jun 13, 2020 at 04:09:46PM +0800, Like Xu wrote:
> From: Wei Wang <wei.w.wang@intel.com>
> 
> The MSR variable type can be 'unsigned int', which uses less memory than
> the longer 'unsigned long'. Fix 'struct x86_pmu' for that. The lbr_nr won't
> be a negative number, so make it 'unsigned int' as well.

Hi, 

What's the status of this patchkit? It would be quite useful to me (and
various other people) to use LBRs in guest. I reviewed it earlier and the
patches all looked good to me.  But i don't see it in any -next tree.

Reviewed-by: Andi Kleen <ak@linux.intel.com>

Could it please be merged?

Thanks,

-Andi
Xu, Like Nov. 11, 2020, 2:14 a.m. UTC | #2 
Hi Paolo,

As you may know, we have got host perf support in Linus' tree
which provides a clear path for enabling guest LBR,

will we merge the remaining LBR KVM patch set?

---

[PATCH RESEND v13 00/10] Guest Last Branch Recording Enabling
https://lore.kernel.org/kvm/20201030035220.102403-1-like.xu@linux.intel.com/

Thanks,
Like Xu

On 2020/11/9 14:34, Andi Kleen wrote:
> Hi,
>
> What's the status of this patchkit? It would be quite useful to me (and
> various other people) to use LBRs in guest. I reviewed it earlier and the
> patches all looked good to me.  But i don't see it in any -next tree.
>
> Reviewed-by: Andi Kleen<ak@linux.intel.com>
>
> Could it please be merged?
>
> Thanks,
>
> -Andi
diff mbox series

Patch

diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index e17a3d8a47ed..eb37f6c43c96 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -673,8 +673,8 @@  struct x86_pmu {
 	/*
 	 * Intel LBR
 	 */
-	unsigned long	lbr_tos, lbr_from, lbr_to; /* MSR base regs       */
-	int		lbr_nr;			   /* hardware stack size */
+	unsigned int	lbr_tos, lbr_from, lbr_to,
+			lbr_nr;			   /* LBR base regs and size */
 	u64		lbr_sel_mask;		   /* LBR_SELECT valid bits */
 	const int	*lbr_sel_map;		   /* lbr_select mappings */
 	bool		lbr_double_abort;	   /* duplicated lbr aborts */