| Message ID | 53a969a83999de91f3ff2809d78335c3f0cc1ee3.1592368322.git.shengjiu.wang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] ASoC: bindings: fsl_spdif: Add new compatible string for imx6sx | expand |
On Wed, Jun 17, 2020 at 12:30:17PM +0800, Shengjiu Wang wrote: > The one difference on imx6sx platform is that the root clock > is shared with ASRC module, so we add a new flags > "shared_root_clock" which means the root clock is independent, "shared" means "not independent", against "independent" ;) > then we will not do the clk_set_rate and clk_round_rate to avoid > impact ASRC module usage. > > As add a new flags, we include the soc specific data struct. > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Can add this once fixing the remaining comments: Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com> > +static inline bool fsl_spdif_can_set_clk_rate(struct fsl_spdif_priv *spdif, > + int clk) Can actually merge into single line as kernel has 100-character limit now, though 80-char is still preferable for a good coding style. But I think this one wouldn't be too bad at all. > @@ -421,7 +456,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, > sysclk_df = spdif_priv->sysclk_df[rate]; > > /* Don't mess up the clocks from other modules */ We can drop this comments now as it's out-of-date and the name of the new helper function is straightforward enough. > - if (clk != STC_TXCLK_SPDIF_ROOT) > + if (!fsl_spdif_can_set_clk_rate(spdif_priv, clk)) > goto clk_set_bypass; > > /* The S/PDIF block needs a clock of 64 * fs * txclk_df */
On Wed, Jun 17, 2020 at 2:27 PM Nicolin Chen <nicoleotsuka@gmail.com> wrote: > > On Wed, Jun 17, 2020 at 12:30:17PM +0800, Shengjiu Wang wrote: > > The one difference on imx6sx platform is that the root clock > > is shared with ASRC module, so we add a new flags > > "shared_root_clock" which means the root clock is independent, > > "shared" means "not independent", against "independent" ;) > > > then we will not do the clk_set_rate and clk_round_rate to avoid > > impact ASRC module usage. > > > > As add a new flags, we include the soc specific data struct. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > Can add this once fixing the remaining comments: > > Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com> > > > +static inline bool fsl_spdif_can_set_clk_rate(struct fsl_spdif_priv *spdif, > > + int clk) > > Can actually merge into single line as kernel has 100-character > limit now, though 80-char is still preferable for a good coding > style. But I think this one wouldn't be too bad at all. > > > @@ -421,7 +456,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, > > sysclk_df = spdif_priv->sysclk_df[rate]; > > > > /* Don't mess up the clocks from other modules */ > > We can drop this comments now as it's out-of-date and the name of > the new helper function is straightforward enough. > ok, will send v3. best regards wang shengjiu
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 1b2e516f9162..8dc1959d0463 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -42,6 +42,18 @@ static u8 srpc_dpll_locked[] = { 0x0, 0x1, 0x2, 0x3, 0x4, 0xa, 0xb }; #define DEFAULT_RXCLK_SRC 1 +/** + * struct fsl_spdif_soc_data: soc specific data + * + * @imx: for imx platform + * @shared_root_clock: flag of sharing a clock source with others; + * so the driver shouldn't set root clock rate + */ +struct fsl_spdif_soc_data { + bool imx; + bool shared_root_clock; +}; + /* * SPDIF control structure * Defines channel status, subcode and Q sub @@ -89,6 +101,7 @@ struct spdif_mixer_control { * @dma_params_rx: DMA parameters for receive channel */ struct fsl_spdif_priv { + const struct fsl_spdif_soc_data *soc; struct spdif_mixer_control fsl_spdif_control; struct snd_soc_dai_driver cpu_dai_drv; struct platform_device *pdev; @@ -110,6 +123,28 @@ struct fsl_spdif_priv { u32 regcache_srpc; }; +static struct fsl_spdif_soc_data fsl_spdif_vf610 = { + .imx = false, + .shared_root_clock = false, +}; + +static struct fsl_spdif_soc_data fsl_spdif_imx35 = { + .imx = true, + .shared_root_clock = false, +}; + +static struct fsl_spdif_soc_data fsl_spdif_imx6sx = { + .imx = true, + .shared_root_clock = true, +}; + +/* Check if clk is a root clock that does not share clock source with others */ +static inline bool fsl_spdif_can_set_clk_rate(struct fsl_spdif_priv *spdif, + int clk) +{ + return (clk == STC_TXCLK_SPDIF_ROOT) && !spdif->soc->shared_root_clock; +} + /* DPLL locked and lock loss interrupt handler */ static void spdif_irq_dpll_lock(struct fsl_spdif_priv *spdif_priv) { @@ -421,7 +456,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, sysclk_df = spdif_priv->sysclk_df[rate]; /* Don't mess up the clocks from other modules */ - if (clk != STC_TXCLK_SPDIF_ROOT) + if (!fsl_spdif_can_set_clk_rate(spdif_priv, clk)) goto clk_set_bypass; /* The S/PDIF block needs a clock of 64 * fs * txclk_df */ @@ -1186,7 +1221,7 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv, continue; ret = fsl_spdif_txclk_caldiv(spdif_priv, clk, savesub, index, - i == STC_TXCLK_SPDIF_ROOT); + fsl_spdif_can_set_clk_rate(spdif_priv, i)); if (savesub == ret) continue; @@ -1230,6 +1265,12 @@ static int fsl_spdif_probe(struct platform_device *pdev) spdif_priv->pdev = pdev; + spdif_priv->soc = of_device_get_match_data(&pdev->dev); + if (!spdif_priv->soc) { + dev_err(&pdev->dev, "failed to get soc data\n"); + return -ENODEV; + } + /* Initialize this copy of the CPU DAI driver structure */ memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai)); spdif_priv->cpu_dai_drv.name = dev_name(&pdev->dev); @@ -1359,8 +1400,9 @@ static const struct dev_pm_ops fsl_spdif_pm = { }; static const struct of_device_id fsl_spdif_dt_ids[] = { - { .compatible = "fsl,imx35-spdif", }, - { .compatible = "fsl,vf610-spdif", }, + { .compatible = "fsl,imx35-spdif", .data = &fsl_spdif_imx35, }, + { .compatible = "fsl,vf610-spdif", .data = &fsl_spdif_vf610, }, + { .compatible = "fsl,imx6sx-spdif", .data = &fsl_spdif_imx6sx, }, {} }; MODULE_DEVICE_TABLE(of, fsl_spdif_dt_ids);
The one difference on imx6sx platform is that the root clock is shared with ASRC module, so we add a new flags "shared_root_clock" which means the root clock is independent, then we will not do the clk_set_rate and clk_round_rate to avoid impact ASRC module usage. As add a new flags, we include the soc specific data struct. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> --- changes in v2 - use shared_root_clk instead ind_root_clk. - add fsl_spdif_can_set_clk_rate function. sound/soc/fsl/fsl_spdif.c | 50 +++++++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 4 deletions(-)