| Message ID | 20200617053934.122642-7-ppandit@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add various undefined MMIO r/w functions | expand |
On 6/17/20 7:39 AM, P J P wrote: > From: Prasad J Pandit <pjp@fedoraproject.org> > > Add spapr msi mmio read method to avoid NULL pointer dereference > issue. > > Reported-by: Lei Sun <slei.casper@gmail.com> > Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> > --- > hw/ppc/spapr_pci.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index 83f1453096..d4193be205 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -52,6 +52,7 @@ > #include "sysemu/kvm.h" > #include "sysemu/hostmem.h" > #include "sysemu/numa.h" > +#include "qemu/log.h" > > /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */ > #define RTAS_QUERY_FN 0 > @@ -738,6 +739,12 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin) > return route; > } > > +static uint64_t spapr_msi_read(void *opaque, hwaddr addr, unsigned size) > +{ > + qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__); > + return 0; > +} > + > /* > * MSI/MSIX memory region implementation. > * The handler handles both MSI and MSIX. > @@ -756,7 +763,7 @@ static void spapr_msi_write(void *opaque, hwaddr addr, > > static const MemoryRegionOps spapr_msi_ops = { > /* There is no .read as the read result is undefined by PCI spec */ We probably want to implement .accepts handler instead. > - .read = NULL, > + .read = spapr_msi_read, > .write = spapr_msi_write, > .endianness = DEVICE_LITTLE_ENDIAN > }; >
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 83f1453096..d4193be205 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -52,6 +52,7 @@ #include "sysemu/kvm.h" #include "sysemu/hostmem.h" #include "sysemu/numa.h" +#include "qemu/log.h" /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */ #define RTAS_QUERY_FN 0 @@ -738,6 +739,12 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin) return route; } +static uint64_t spapr_msi_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__); + return 0; +} + /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. @@ -756,7 +763,7 @@ static void spapr_msi_write(void *opaque, hwaddr addr, static const MemoryRegionOps spapr_msi_ops = { /* There is no .read as the read result is undefined by PCI spec */ - .read = NULL, + .read = spapr_msi_read, .write = spapr_msi_write, .endianness = DEVICE_LITTLE_ENDIAN };