From patchwork Tue Jun 23 21:52:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 11621861 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F3E990 for ; Tue, 23 Jun 2020 21:51:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D1B02078E for ; Tue, 23 Jun 2020 21:51:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0D1B02078E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B69E96EA5F; Tue, 23 Jun 2020 21:51:12 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 17B426EA60 for ; Tue, 23 Jun 2020 21:51:12 +0000 (UTC) IronPort-SDR: Tw1pqpHFZCszCcOyXuV8eZGIxrwZDyxusYG6a3qTusqEqtpGaGOx74Ru1kdDy/EXxkVb21keve gcsxFxkpZ8aw== X-IronPort-AV: E=McAfee;i="6000,8403,9661"; a="123912760" X-IronPort-AV: E=Sophos;i="5.75,272,1589266800"; d="scan'208";a="123912760" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2020 14:51:11 -0700 IronPort-SDR: J5RBiB89lS0N/OJWZnTu6fxrnWaH3k3qt7zLz5HSQf5cx35FLupbyiZjXkYxB6mgifv69jsNAM nA0KksurTwfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,272,1589266800"; d="scan'208";a="478901149" Received: from susheelh-mobl2.amr.corp.intel.com (HELO josouza-MOBL2.amr.corp.intel.com) ([10.254.9.172]) by fmsmga006.fm.intel.com with ESMTP; 23 Jun 2020 14:51:11 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Tue, 23 Jun 2020 14:52:35 -0700 Message-Id: <20200623215235.125665-2-jose.souza@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200623215235.125665-1-jose.souza@intel.com> References: <20200623215235.125665-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915/display: Rename COMP_INIT to CNL_PORT_COMP_DW0_COMP_INIT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Doing this rename to match with other registers and avoid name clash in case other register has the same name. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_combo_phy.c | 14 ++++++++------ drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c index 9eba6e59fff3..38496d2e37fc 100644 --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c @@ -129,7 +129,7 @@ static bool cnl_verify_procmon_ref_values(struct drm_i915_private *dev_priv, static bool cnl_combo_phy_enabled(struct drm_i915_private *dev_priv) { return !(intel_de_read(dev_priv, CHICKEN_MISC_2) & CNL_COMP_PWR_DOWN) && - (intel_de_read(dev_priv, CNL_PORT_COMP_DW0) & COMP_INIT); + (intel_de_read(dev_priv, CNL_PORT_COMP_DW0) & CNL_PORT_COMP_DW0_COMP_INIT); } static bool cnl_combo_phy_verify_state(struct drm_i915_private *dev_priv) @@ -160,7 +160,7 @@ static void cnl_combo_phys_init(struct drm_i915_private *dev_priv) cnl_set_procmon_ref_values(dev_priv, PHY_A); val = intel_de_read(dev_priv, CNL_PORT_COMP_DW0); - val |= COMP_INIT; + val |= CNL_PORT_COMP_DW0_COMP_INIT; intel_de_write(dev_priv, CNL_PORT_COMP_DW0, val); val = intel_de_read(dev_priv, CNL_PORT_CL1CM_DW5); @@ -198,13 +198,15 @@ static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy) static bool icl_combo_phy_enabled(struct drm_i915_private *dev_priv, enum phy phy) { + const u32 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)); + /* The PHY C added by EHL has no PHY_MISC register */ if (!has_phy_misc(dev_priv, phy)) - return intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT; + return val & CNL_PORT_COMP_DW0_COMP_INIT; else return !(intel_de_read(dev_priv, ICL_PHY_MISC(phy)) & ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN) && - (intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT); + (val & CNL_PORT_COMP_DW0_COMP_INIT); } static bool ehl_vbt_ddi_d_present(struct drm_i915_private *i915) @@ -388,7 +390,7 @@ static void icl_combo_phys_init(struct drm_i915_private *dev_priv) } val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)); - val |= COMP_INIT; + val |= CNL_PORT_COMP_DW0_COMP_INIT; intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val); val = intel_de_read(dev_priv, ICL_PORT_CL_DW5(phy)); @@ -448,7 +450,7 @@ static void icl_combo_phys_uninit(struct drm_i915_private *dev_priv) skip_phy_misc: val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)); - val &= ~COMP_INIT; + val &= ~CNL_PORT_COMP_DW0_COMP_INIT; intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val); } } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index dbbe20a38345..6938f4d251ae 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1909,7 +1909,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define CNL_PORT_COMP_DW0 _MMIO(0x162100) #define ICL_PORT_COMP_DW0(phy) _MMIO(_ICL_PORT_COMP_DW(0, phy)) -#define COMP_INIT REG_BIT(31) +#define CNL_PORT_COMP_DW0_COMP_INIT REG_BIT(31) #define ICL_PORT_COMP_DW0_GRCCODE_LDO_MASK REG_GENMASK(7, 0) #define CNL_PORT_COMP_DW1 _MMIO(0x162104)