diff mbox series

arm64: kpti: Add KRYO{3, 4}XX silver CPU cores to kpti safelist

Message ID 20200624123406.3472-1-saiprakash.ranjan@codeaurora.org (mailing list archive)
State Mainlined
Commit f4617be35b4b547e82d30993f56d631dfc2d5f88
Headers show
Series arm64: kpti: Add KRYO{3, 4}XX silver CPU cores to kpti safelist | expand

Commit Message

Sai Prakash Ranjan June 24, 2020, 12:34 p.m. UTC
QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55
and are meltdown safe, hence add them to kpti_safe_list[].

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
 arch/arm64/kernel/cpufeature.c | 2 ++
 1 file changed, 2 insertions(+)


base-commit: cfafde3c949cae39483639c03c5da5fd91bb234e

Comments

Doug Anderson June 24, 2020, 1:54 p.m. UTC | #1
Hi,

On Wed, Jun 24, 2020 at 5:34 AM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55
> and are meltdown safe, hence add them to kpti_safe_list[].
>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> ---
>  arch/arm64/kernel/cpufeature.c | 2 ++
>  1 file changed, 2 insertions(+)

Reported-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Will Deacon June 24, 2020, 1:54 p.m. UTC | #2
On Wed, 24 Jun 2020 18:04:06 +0530, Sai Prakash Ranjan wrote:
> QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55
> and are meltdown safe, hence add them to kpti_safe_list[].

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64: kpti: Add KRYO{3, 4}XX silver CPU cores to kpti safelist
      https://git.kernel.org/arm64/c/f4617be35b4b

Cheers,
diff mbox series

Patch

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 4ae41670c2e6..9f63053a63a9 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1290,6 +1290,8 @@  static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
 		MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
 		MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
 		{ /* sentinel */ }
 	};
 	char const *str = "kpti command line option";