| Message ID | 20200629135722.73558-5-aneesh.kumar@linux.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support new pmem flush and sync instructions for POWER | expand |
Hi "Aneesh,
I love your patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on linux-nvdimm/libnvdimm-for-next v5.8-rc3 next-20200629]
[cannot apply to scottwood/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/Support-new-pmem-flush-and-sync-instructions-for-POWER/20200629-223649
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: arc-allyesconfig (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/nvdimm/region_devs.c: In function 'generic_nvdimm_flush':
>> drivers/nvdimm/region_devs.c:1215:2: error: implicit declaration of function 'arch_pmem_flush_barrier' [-Werror=implicit-function-declaration]
1215 | arch_pmem_flush_barrier();
| ^~~~~~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/arch_pmem_flush_barrier +1215 drivers/nvdimm/region_devs.c
1178
1179 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1180 {
1181 int rc = 0;
1182
1183 if (!nd_region->flush)
1184 rc = generic_nvdimm_flush(nd_region);
1185 else {
1186 if (nd_region->flush(nd_region, bio))
1187 rc = -EIO;
1188 }
1189
1190 return rc;
1191 }
1192 /**
1193 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1194 * @nd_region: blk or interleaved pmem region
1195 */
1196 int generic_nvdimm_flush(struct nd_region *nd_region)
1197 {
1198 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
1199 int i, idx;
1200
1201 /*
1202 * Try to encourage some diversity in flush hint addresses
1203 * across cpus assuming a limited number of flush hints.
1204 */
1205 idx = this_cpu_read(flush_idx);
1206 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
1207
1208 /*
1209 * The first arch_pmem_flush_barrier() is needed to 'sfence' all
1210 * previous writes such that they are architecturally visible for
1211 * the platform buffer flush. Note that we've already arranged for pmem
1212 * writes to avoid the cache via memcpy_flushcache(). The final
1213 * wmb() ensures ordering for the NVDIMM flush write.
1214 */
> 1215 arch_pmem_flush_barrier();
1216 for (i = 0; i < nd_region->ndr_mappings; i++)
1217 if (ndrd_get_flush_wpq(ndrd, i, 0))
1218 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
1219 wmb();
1220
1221 return 0;
1222 }
1223 EXPORT_SYMBOL_GPL(nvdimm_flush);
1224
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Hi "Aneesh,
I love your patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on linux-nvdimm/libnvdimm-for-next v5.8-rc3 next-20200629]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/Support-new-pmem-flush-and-sync-instructions-for-POWER/20200629-223649
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/md/dm-writecache.c: In function 'writecache_commit_flushed':
>> drivers/md/dm-writecache.c:539:3: error: implicit declaration of function 'arch_pmem_flush_barrier' [-Werror=implicit-function-declaration]
539 | arch_pmem_flush_barrier();
| ^~~~~~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/arch_pmem_flush_barrier +539 drivers/md/dm-writecache.c
535
536 static void writecache_commit_flushed(struct dm_writecache *wc, bool wait_for_ios)
537 {
538 if (WC_MODE_PMEM(wc))
> 539 arch_pmem_flush_barrier();
540 else
541 ssd_commit_flushed(wc, wait_for_ios);
542 }
543
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
kernel test robot <lkp@intel.com> writes: > Hi "Aneesh, > > I love your patch! Yet something to improve: > > [auto build test ERROR on powerpc/next] > [also build test ERROR on linux-nvdimm/libnvdimm-for-next v5.8-rc3 next-20200629] > [cannot apply to scottwood/next] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use as documented in > https://git-scm.com/docs/git-format-patch] > > url: https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/Support-new-pmem-flush-and-sync-instructions-for-POWER/20200629-223649 > base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next > config: arc-allyesconfig (attached as .config) > compiler: arc-elf-gcc (GCC) 9.3.0 > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com> > > All errors (new ones prefixed by >>): > > drivers/nvdimm/region_devs.c: In function 'generic_nvdimm_flush': >>> drivers/nvdimm/region_devs.c:1215:2: error: implicit declaration of function 'arch_pmem_flush_barrier' [-Werror=implicit-function-declaration] > 1215 | arch_pmem_flush_barrier(); > | ^~~~~~~~~~~~~~~~~~~~~~~ > cc1: some warnings being treated as errors Ok let's move the back to include/linux/libnvdimm.h. Not all arch include asm-generic/cacheflush.h -aneesh
diff --git a/drivers/md/dm-writecache.c b/drivers/md/dm-writecache.c index 74f3c506f084..8c6b6dce64e2 100644 --- a/drivers/md/dm-writecache.c +++ b/drivers/md/dm-writecache.c @@ -536,7 +536,7 @@ static void ssd_commit_superblock(struct dm_writecache *wc) static void writecache_commit_flushed(struct dm_writecache *wc, bool wait_for_ios) { if (WC_MODE_PMEM(wc)) - wmb(); + arch_pmem_flush_barrier(); else ssd_commit_flushed(wc, wait_for_ios); } diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c index 4502f9c4708d..b308ad09b63d 100644 --- a/drivers/nvdimm/region_devs.c +++ b/drivers/nvdimm/region_devs.c @@ -1206,13 +1206,13 @@ int generic_nvdimm_flush(struct nd_region *nd_region) idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8)); /* - * The first wmb() is needed to 'sfence' all previous writes - * such that they are architecturally visible for the platform - * buffer flush. Note that we've already arranged for pmem + * The first arch_pmem_flush_barrier() is needed to 'sfence' all + * previous writes such that they are architecturally visible for + * the platform buffer flush. Note that we've already arranged for pmem * writes to avoid the cache via memcpy_flushcache(). The final * wmb() ensures ordering for the NVDIMM flush write. */ - wmb(); + arch_pmem_flush_barrier(); for (i = 0; i < nd_region->ndr_mappings; i++) if (ndrd_get_flush_wpq(ndrd, i, 0)) writeq(1, ndrd_get_flush_wpq(ndrd, i, idx)); diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cacheflush.h index 907fa5d16494..e30a9aa950dc 100644 --- a/include/asm-generic/cacheflush.h +++ b/include/asm-generic/cacheflush.h @@ -110,4 +110,8 @@ static inline void flush_cache_vunmap(unsigned long start, unsigned long end) memcpy(dst, src, len) #endif +#ifndef arch_pmem_flush_barrier +#define arch_pmem_flush_barrier() wmb() +#endif + #endif /* _ASM_GENERIC_CACHEFLUSH_H */
Architectures like ppc64 provide persistent memory specific barriers that will ensure that all stores for which the modifications are written to persistent storage by preceding dcbfps and dcbstps instructions have updated persistent storage before any data access or data transfer caused by subsequent instructions is initiated. This is in addition to the ordering done by wmb() Update nvdimm core such that architecture can use barriers other than wmb to ensure all previous writes are architecturally visible for the platform buffer flush. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- drivers/md/dm-writecache.c | 2 +- drivers/nvdimm/region_devs.c | 8 ++++---- include/asm-generic/cacheflush.h | 4 ++++ 3 files changed, 9 insertions(+), 5 deletions(-)