diff mbox series

KVM: arm64: Change default caching mode for {PEND, PROP}BASER.outer

Message ID 20200701140206.8664-1-graf@amazon.com (mailing list archive)
State Mainlined
Commit 731532176716e2775a5d21115bb9c5c61e0cb704
Headers show
Series KVM: arm64: Change default caching mode for {PEND, PROP}BASER.outer | expand

Commit Message

Alexander Graf July 1, 2020, 2:02 p.m. UTC
PENDBASER and PROPBASER define the outer caching mode for LPI tables.
The memory backing them may not be outer sharable, so we mark them as nC
by default. This however, breaks Windows on ARM which only accepts
SameAsInner or RaWaWb as values for outer cachability.

We do today already allow the outer mode to be set to SameAsInner
explicitly, so the easy fix is to default to that instead of nC for
situations when an OS asks for a not fulfillable cachability request.

This fixes booting Windows in KVM with vgicv3 and ITS enabled for me.

Signed-off-by: Alexander Graf <graf@amazon.com>
---
 arch/arm64/kvm/vgic/vgic-mmio-v3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Marc Zyngier July 5, 2020, 6:11 p.m. UTC | #1
On Wed, 01 Jul 2020 15:02:06 +0100,
Alexander Graf <graf@amazon.com> wrote:
> 
> PENDBASER and PROPBASER define the outer caching mode for LPI tables.
> The memory backing them may not be outer sharable, so we mark them as nC
> by default. This however, breaks Windows on ARM which only accepts
> SameAsInner or RaWaWb as values for outer cachability.
> 
> We do today already allow the outer mode to be set to SameAsInner
> explicitly, so the easy fix is to default to that instead of nC for
> situations when an OS asks for a not fulfillable cachability request.
> 
> This fixes booting Windows in KVM with vgicv3 and ITS enabled for me.
> 
> Signed-off-by: Alexander Graf <graf@amazon.com>
> ---
>  arch/arm64/kvm/vgic/vgic-mmio-v3.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> index d2339a2b9fb9..5c786b915cd3 100644
> --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> @@ -389,7 +389,7 @@ u64 vgic_sanitise_outer_cacheability(u64 field)
>  	case GIC_BASER_CACHE_nC:
>  		return field;
>  	default:
> -		return GIC_BASER_CACHE_nC;
> +		return GIC_BASER_CACHE_SameAsInner;
>  	}
>  }
>  

I am going to provisionally queue this for 5.9, with the explicit
reserve that it will be reverted if it causes a regression for other
guests (as this is an observable change in behaviour).

Thanks,

	M.
Marc Zyngier July 5, 2020, 6:18 p.m. UTC | #2
On Wed, 1 Jul 2020 16:02:06 +0200, Alexander Graf wrote:
> PENDBASER and PROPBASER define the outer caching mode for LPI tables.
> The memory backing them may not be outer sharable, so we mark them as nC
> by default. This however, breaks Windows on ARM which only accepts
> SameAsInner or RaWaWb as values for outer cachability.
> 
> We do today already allow the outer mode to be set to SameAsInner
> explicitly, so the easy fix is to default to that instead of nC for
> situations when an OS asks for a not fulfillable cachability request.
> 
> [...]

Applied to kvm-arm64/next-5.9, thanks!

[1/1] KVM: arm64: vgic-its: Change default outer cacheability for {PEND, PROP}BASER
      commit: 731532176716e2775a5d21115bb9c5c61e0cb704

Cheers,

	M.
diff mbox series

Patch

diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
index d2339a2b9fb9..5c786b915cd3 100644
--- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c
+++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
@@ -389,7 +389,7 @@  u64 vgic_sanitise_outer_cacheability(u64 field)
 	case GIC_BASER_CACHE_nC:
 		return field;
 	default:
-		return GIC_BASER_CACHE_nC;
+		return GIC_BASER_CACHE_SameAsInner;
 	}
 }