diff mbox series

[kvm-unit-tests,v2,2/8] arm64: microbench: Use the funcions for ipi test as the general functions for gic(ipi/lpi/timer) test

Message ID 20200702030132.20252-3-wangjingyi11@huawei.com (mailing list archive)
State New, archived
Headers show
Series arm/arm64: Add IPI/LPI/vtimer latency test | expand

Commit Message

Jingyi Wang July 2, 2020, 3:01 a.m. UTC
The following patches will use that.

Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
---
 arm/micro-bench.c | 39 ++++++++++++++++++++++-----------------
 1 file changed, 22 insertions(+), 17 deletions(-)

Comments

Andrew Jones July 2, 2020, 5:25 a.m. UTC | #1
Hi Jingyi,

This patch has quite a long summary. How about instead of

 arm64: microbench: Use the funcions for ipi test as the general functions for gic(ipi/lpi/timer) test

we use

 arm64: microbench: Generalize ipi test names

and then in the commit message, instead of

 The following patches will use that.

we use

 Later patches will use these functions for gic(ipi/lpi/timer) tests.

Thanks,
drew

On Thu, Jul 02, 2020 at 11:01:26AM +0800, Jingyi Wang wrote:
> The following patches will use that.
> 
> Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
> ---
>  arm/micro-bench.c | 39 ++++++++++++++++++++++-----------------
>  1 file changed, 22 insertions(+), 17 deletions(-)
> 
> diff --git a/arm/micro-bench.c b/arm/micro-bench.c
> index 794dfac..fc4d356 100644
> --- a/arm/micro-bench.c
> +++ b/arm/micro-bench.c
> @@ -25,24 +25,24 @@
>  
>  static u32 cntfrq;
>  
> -static volatile bool ipi_ready, ipi_received;
> +static volatile bool irq_ready, irq_received;
>  static void *vgic_dist_base;
>  static void (*write_eoir)(u32 irqstat);
>  
> -static void ipi_irq_handler(struct pt_regs *regs)
> +static void gic_irq_handler(struct pt_regs *regs)
>  {
> -	ipi_ready = false;
> -	ipi_received = true;
> +	irq_ready = false;
> +	irq_received = true;
>  	gic_write_eoir(gic_read_iar());
> -	ipi_ready = true;
> +	irq_ready = true;
>  }
>  
> -static void ipi_secondary_entry(void *data)
> +static void gic_secondary_entry(void *data)
>  {
> -	install_irq_handler(EL1H_IRQ, ipi_irq_handler);
> +	install_irq_handler(EL1H_IRQ, gic_irq_handler);
>  	gic_enable_defaults();
>  	local_irq_enable();
> -	ipi_ready = true;
> +	irq_ready = true;
>  	while (true)
>  		cpu_relax();
>  }
> @@ -72,9 +72,9 @@ static bool test_init(void)
>  		break;
>  	}
>  
> -	ipi_ready = false;
> +	irq_ready = false;
>  	gic_enable_defaults();
> -	on_cpu_async(1, ipi_secondary_entry, NULL);
> +	on_cpu_async(1, gic_secondary_entry, NULL);
>  
>  	cntfrq = get_cntfrq();
>  	printf("Timer Frequency %d Hz (Output in microseconds)\n", cntfrq);
> @@ -82,13 +82,18 @@ static bool test_init(void)
>  	return true;
>  }
>  
> -static void ipi_prep(void)
> +static void gic_prep_common(void)
>  {
>  	unsigned tries = 1 << 28;
>  
> -	while (!ipi_ready && tries--)
> +	while (!irq_ready && tries--)
>  		cpu_relax();
> -	assert(ipi_ready);
> +	assert(irq_ready);
> +}
> +
> +static void ipi_prep(void)
> +{
> +	gic_prep_common();
>  }
>  
>  static void ipi_exec(void)
> @@ -96,17 +101,17 @@ static void ipi_exec(void)
>  	unsigned tries = 1 << 28;
>  	static int received = 0;
>  
> -	ipi_received = false;
> +	irq_received = false;
>  
>  	gic_ipi_send_single(1, 1);
>  
> -	while (!ipi_received && tries--)
> +	while (!irq_received && tries--)
>  		cpu_relax();
>  
> -	if (ipi_received)
> +	if (irq_received)
>  		++received;
>  
> -	assert_msg(ipi_received, "failed to receive IPI in time, but received %d successfully\n", received);
> +	assert_msg(irq_received, "failed to receive IPI in time, but received %d successfully\n", received);
>  }
>  
>  static void hvc_exec(void)
> -- 
> 2.19.1
> 
>
Jingyi Wang July 2, 2020, 8:21 a.m. UTC | #2
Hi Drew,

On 7/2/2020 1:25 PM, Andrew Jones wrote:
> 
> Hi Jingyi,
> 
> This patch has quite a long summary. How about instead of
> 
>   arm64: microbench: Use the funcions for ipi test as the general functions for gic(ipi/lpi/timer) test
> 
> we use
> 
>   arm64: microbench: Generalize ipi test names
> 
> and then in the commit message, instead of
> 
>   The following patches will use that.
> 
> we use
> 
>   Later patches will use these functions for gic(ipi/lpi/timer) tests.
> 
> Thanks,
> drew
> 

This looks more concise, thanks for reviewing

Thanks,
Jingyi

> On Thu, Jul 02, 2020 at 11:01:26AM +0800, Jingyi Wang wrote:
>> The following patches will use that.
>>
>> Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
>> ---
>>   arm/micro-bench.c | 39 ++++++++++++++++++++++-----------------
>>   1 file changed, 22 insertions(+), 17 deletions(-)
>>
>> diff --git a/arm/micro-bench.c b/arm/micro-bench.c
>> index 794dfac..fc4d356 100644
>> --- a/arm/micro-bench.c
>> +++ b/arm/micro-bench.c
>> @@ -25,24 +25,24 @@
>>   
>>   static u32 cntfrq;
>>   
>> -static volatile bool ipi_ready, ipi_received;
>> +static volatile bool irq_ready, irq_received;
>>   static void *vgic_dist_base;
>>   static void (*write_eoir)(u32 irqstat);
>>   
>> -static void ipi_irq_handler(struct pt_regs *regs)
>> +static void gic_irq_handler(struct pt_regs *regs)
>>   {
>> -	ipi_ready = false;
>> -	ipi_received = true;
>> +	irq_ready = false;
>> +	irq_received = true;
>>   	gic_write_eoir(gic_read_iar());
>> -	ipi_ready = true;
>> +	irq_ready = true;
>>   }
>>   
>> -static void ipi_secondary_entry(void *data)
>> +static void gic_secondary_entry(void *data)
>>   {
>> -	install_irq_handler(EL1H_IRQ, ipi_irq_handler);
>> +	install_irq_handler(EL1H_IRQ, gic_irq_handler);
>>   	gic_enable_defaults();
>>   	local_irq_enable();
>> -	ipi_ready = true;
>> +	irq_ready = true;
>>   	while (true)
>>   		cpu_relax();
>>   }
>> @@ -72,9 +72,9 @@ static bool test_init(void)
>>   		break;
>>   	}
>>   
>> -	ipi_ready = false;
>> +	irq_ready = false;
>>   	gic_enable_defaults();
>> -	on_cpu_async(1, ipi_secondary_entry, NULL);
>> +	on_cpu_async(1, gic_secondary_entry, NULL);
>>   
>>   	cntfrq = get_cntfrq();
>>   	printf("Timer Frequency %d Hz (Output in microseconds)\n", cntfrq);
>> @@ -82,13 +82,18 @@ static bool test_init(void)
>>   	return true;
>>   }
>>   
>> -static void ipi_prep(void)
>> +static void gic_prep_common(void)
>>   {
>>   	unsigned tries = 1 << 28;
>>   
>> -	while (!ipi_ready && tries--)
>> +	while (!irq_ready && tries--)
>>   		cpu_relax();
>> -	assert(ipi_ready);
>> +	assert(irq_ready);
>> +}
>> +
>> +static void ipi_prep(void)
>> +{
>> +	gic_prep_common();
>>   }
>>   
>>   static void ipi_exec(void)
>> @@ -96,17 +101,17 @@ static void ipi_exec(void)
>>   	unsigned tries = 1 << 28;
>>   	static int received = 0;
>>   
>> -	ipi_received = false;
>> +	irq_received = false;
>>   
>>   	gic_ipi_send_single(1, 1);
>>   
>> -	while (!ipi_received && tries--)
>> +	while (!irq_received && tries--)
>>   		cpu_relax();
>>   
>> -	if (ipi_received)
>> +	if (irq_received)
>>   		++received;
>>   
>> -	assert_msg(ipi_received, "failed to receive IPI in time, but received %d successfully\n", received);
>> +	assert_msg(irq_received, "failed to receive IPI in time, but received %d successfully\n", received);
>>   }
>>   
>>   static void hvc_exec(void)
>> -- 
>> 2.19.1
>>
>>
> 
> 
> .
>
Eric Auger July 2, 2020, 12:36 p.m. UTC | #3
Hi,

On 7/2/20 5:01 AM, Jingyi Wang wrote:
> The following patches will use that.
> 
> Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
> ---
>  arm/micro-bench.c | 39 ++++++++++++++++++++++-----------------
>  1 file changed, 22 insertions(+), 17 deletions(-)
> 
With commit message suggested by Drew,

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Eric
> diff --git a/arm/micro-bench.c b/arm/micro-bench.c
> index 794dfac..fc4d356 100644
> --- a/arm/micro-bench.c
> +++ b/arm/micro-bench.c
> @@ -25,24 +25,24 @@
>  
>  static u32 cntfrq;
>  
> -static volatile bool ipi_ready, ipi_received;
> +static volatile bool irq_ready, irq_received;
>  static void *vgic_dist_base;
>  static void (*write_eoir)(u32 irqstat);
>  
> -static void ipi_irq_handler(struct pt_regs *regs)
> +static void gic_irq_handler(struct pt_regs *regs)
>  {
> -	ipi_ready = false;
> -	ipi_received = true;
> +	irq_ready = false;
> +	irq_received = true;
>  	gic_write_eoir(gic_read_iar());
> -	ipi_ready = true;
> +	irq_ready = true;
>  }
>  
> -static void ipi_secondary_entry(void *data)
> +static void gic_secondary_entry(void *data)
>  {
> -	install_irq_handler(EL1H_IRQ, ipi_irq_handler);
> +	install_irq_handler(EL1H_IRQ, gic_irq_handler);
>  	gic_enable_defaults();
>  	local_irq_enable();
> -	ipi_ready = true;
> +	irq_ready = true;
>  	while (true)
>  		cpu_relax();
>  }
> @@ -72,9 +72,9 @@ static bool test_init(void)
>  		break;
>  	}
>  
> -	ipi_ready = false;
> +	irq_ready = false;
>  	gic_enable_defaults();
> -	on_cpu_async(1, ipi_secondary_entry, NULL);
> +	on_cpu_async(1, gic_secondary_entry, NULL);
>  
>  	cntfrq = get_cntfrq();
>  	printf("Timer Frequency %d Hz (Output in microseconds)\n", cntfrq);
> @@ -82,13 +82,18 @@ static bool test_init(void)
>  	return true;
>  }
>  
> -static void ipi_prep(void)
> +static void gic_prep_common(void)
>  {
>  	unsigned tries = 1 << 28;
>  
> -	while (!ipi_ready && tries--)
> +	while (!irq_ready && tries--)
>  		cpu_relax();
> -	assert(ipi_ready);
> +	assert(irq_ready);
> +}
> +
> +static void ipi_prep(void)
> +{
> +	gic_prep_common();
>  }
>  
>  static void ipi_exec(void)
> @@ -96,17 +101,17 @@ static void ipi_exec(void)
>  	unsigned tries = 1 << 28;
>  	static int received = 0;
>  
> -	ipi_received = false;
> +	irq_received = false;
>  
>  	gic_ipi_send_single(1, 1);
>  
> -	while (!ipi_received && tries--)
> +	while (!irq_received && tries--)
>  		cpu_relax();
>  
> -	if (ipi_received)
> +	if (irq_received)
>  		++received;
>  
> -	assert_msg(ipi_received, "failed to receive IPI in time, but received %d successfully\n", received);
> +	assert_msg(irq_received, "failed to receive IPI in time, but received %d successfully\n", received);
>  }
>  
>  static void hvc_exec(void)
>
diff mbox series

Patch

diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 794dfac..fc4d356 100644
--- a/arm/micro-bench.c
+++ b/arm/micro-bench.c
@@ -25,24 +25,24 @@ 
 
 static u32 cntfrq;
 
-static volatile bool ipi_ready, ipi_received;
+static volatile bool irq_ready, irq_received;
 static void *vgic_dist_base;
 static void (*write_eoir)(u32 irqstat);
 
-static void ipi_irq_handler(struct pt_regs *regs)
+static void gic_irq_handler(struct pt_regs *regs)
 {
-	ipi_ready = false;
-	ipi_received = true;
+	irq_ready = false;
+	irq_received = true;
 	gic_write_eoir(gic_read_iar());
-	ipi_ready = true;
+	irq_ready = true;
 }
 
-static void ipi_secondary_entry(void *data)
+static void gic_secondary_entry(void *data)
 {
-	install_irq_handler(EL1H_IRQ, ipi_irq_handler);
+	install_irq_handler(EL1H_IRQ, gic_irq_handler);
 	gic_enable_defaults();
 	local_irq_enable();
-	ipi_ready = true;
+	irq_ready = true;
 	while (true)
 		cpu_relax();
 }
@@ -72,9 +72,9 @@  static bool test_init(void)
 		break;
 	}
 
-	ipi_ready = false;
+	irq_ready = false;
 	gic_enable_defaults();
-	on_cpu_async(1, ipi_secondary_entry, NULL);
+	on_cpu_async(1, gic_secondary_entry, NULL);
 
 	cntfrq = get_cntfrq();
 	printf("Timer Frequency %d Hz (Output in microseconds)\n", cntfrq);
@@ -82,13 +82,18 @@  static bool test_init(void)
 	return true;
 }
 
-static void ipi_prep(void)
+static void gic_prep_common(void)
 {
 	unsigned tries = 1 << 28;
 
-	while (!ipi_ready && tries--)
+	while (!irq_ready && tries--)
 		cpu_relax();
-	assert(ipi_ready);
+	assert(irq_ready);
+}
+
+static void ipi_prep(void)
+{
+	gic_prep_common();
 }
 
 static void ipi_exec(void)
@@ -96,17 +101,17 @@  static void ipi_exec(void)
 	unsigned tries = 1 << 28;
 	static int received = 0;
 
-	ipi_received = false;
+	irq_received = false;
 
 	gic_ipi_send_single(1, 1);
 
-	while (!ipi_received && tries--)
+	while (!irq_received && tries--)
 		cpu_relax();
 
-	if (ipi_received)
+	if (irq_received)
 		++received;
 
-	assert_msg(ipi_received, "failed to receive IPI in time, but received %d successfully\n", received);
+	assert_msg(irq_received, "failed to receive IPI in time, but received %d successfully\n", received);
 }
 
 static void hvc_exec(void)