[v2,1/2] drm/i915/gem: Only revoke the GGTT mmappings on aperture detiling changes
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Message ID 20200702130605.14747-1-chris@chris-wilson.co.uk
State New
Headers show
Series
  • [v2,1/2] drm/i915/gem: Only revoke the GGTT mmappings on aperture detiling changes
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Commit Message

Chris Wilson July 2, 2020, 1:06 p.m. UTC
Only a GGTT mmaping will use the aperture detiling registers, so only a
tiling change for an object, we only need to revoke those mmapings and
not the CPU mmapings (which are always linear irrespective of the tiling).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c   | 2 +-
 drivers/gpu/drm/i915/gem/i915_gem_mman.h   | 5 ++++-
 drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +-
 3 files changed, 6 insertions(+), 3 deletions(-)

Comments

Tvrtko Ursulin July 2, 2020, 3:48 p.m. UTC | #1
On 02/07/2020 14:06, Chris Wilson wrote:
> Only a GGTT mmaping will use the aperture detiling registers, so only a
> tiling change for an object, we only need to revoke those mmapings and
> not the CPU mmapings (which are always linear irrespective of the tiling).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_mman.c   | 2 +-
>   drivers/gpu/drm/i915/gem/i915_gem_mman.h   | 5 ++++-
>   drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +-
>   3 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index fe27c5b344e3..7c2650cfb070 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -448,7 +448,7 @@ void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
>    * mapping will then trigger a page fault on the next user access, allowing
>    * fixup by vm_fault_gtt().
>    */
> -static void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
> +void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
>   {
>   	struct drm_i915_private *i915 = to_i915(obj->base.dev);
>   	intel_wakeref_t wakeref;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> index 862e01b7cb69..7c5ccdf59359 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> @@ -24,8 +24,11 @@ int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
>   			      struct drm_device *dev,
>   			      u32 handle, u64 *offset);
>   
> -void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
>   void i915_gem_object_release_mmap(struct drm_i915_gem_object *obj);
> +
> +void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
> +void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
> +
>   void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
>   
>   #endif
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> index 0158e49bf9bb..ff72ee2fd9cd 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> @@ -299,7 +299,7 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
>   	i915_gem_object_unlock(obj);
>   
>   	/* Force the fence to be reacquired for GTT access */
> -	i915_gem_object_release_mmap(obj);
> +	i915_gem_object_release_mmap_gtt(obj);
>   
>   	/* Try to preallocate memory required to save swizzling on put-pages */
>   	if (i915_gem_object_needs_bit17_swizzle(obj)) {
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index fe27c5b344e3..7c2650cfb070 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -448,7 +448,7 @@  void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
  * mapping will then trigger a page fault on the next user access, allowing
  * fixup by vm_fault_gtt().
  */
-static void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
+void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
 {
 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 	intel_wakeref_t wakeref;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index 862e01b7cb69..7c5ccdf59359 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -24,8 +24,11 @@  int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
 			      struct drm_device *dev,
 			      u32 handle, u64 *offset);
 
-void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
 void i915_gem_object_release_mmap(struct drm_i915_gem_object *obj);
+
+void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
+void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
+
 void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
 
 #endif
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
index 0158e49bf9bb..ff72ee2fd9cd 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
@@ -299,7 +299,7 @@  i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
 	i915_gem_object_unlock(obj);
 
 	/* Force the fence to be reacquired for GTT access */
-	i915_gem_object_release_mmap(obj);
+	i915_gem_object_release_mmap_gtt(obj);
 
 	/* Try to preallocate memory required to save swizzling on put-pages */
 	if (i915_gem_object_needs_bit17_swizzle(obj)) {