Message ID | 20200702134903.602364-2-ayaz.siddiqui@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/gt: Initialize reserved and unspecified MOCS indices | expand |
On Thu, Jul 02, 2020 at 07:19:03PM +0530, Ayaz A Siddiqui wrote: >In order to avoid functional breakage of mis-programmed applications that >have grown to depend on unused MOCS entries, we are programming >those entries to be equal to fully cached ("L3 + LLC") entry. > >These reserved and unspecified entries should not be used as they may be >changed to less performant variants with better coherency in the future >if more entries are needed. > >V2: As suggested by Lucas "De Marchi" to utilise __init_mocs_table for >programming default value, setting I915_MOCS_PTE index of tgl_mocs_table >with desired value. either Lucas or Lucas De Marchi, but quoting last name like this is too creative. Also, check for some typos below. Other than those, Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > >Cc: Chris Wilson <chris@chris-wilson.co.uk> >Cc: Lucas De Marchi <lucas.demarchi@intel.com> >Cc: Tomasz Lis <tomasz.lis@intel.com> >Cc: Matt Roper <matthew.d.roper@intel.com> >Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >Cc: Francisco Jerez <currojerez@riseup.net> >Cc: Mathew Alwin <alwin.mathew@intel.com> >Cc: Mcguire Russell W <russell.w.mcguire@intel.com> >Cc: Spruit Neil R <neil.r.spruit@intel.com> >Cc: Zhou Cheng <cheng.zhou@intel.com> >Cc: Benemelis Mike G <mike.g.benemelis@intel.com> > >Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com> >--- > drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > >diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c >index 632e08a4592b2..c32f90bd56693 100644 >--- a/drivers/gpu/drm/i915/gt/intel_mocs.c >+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c >@@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = { > L3_1_UC) > > static const struct drm_i915_mocs_entry tgl_mocs_table[] = { >- /* Base - Error (Reserved for Non-Use) */ >- MOCS_ENTRY(0, 0x0, 0x0), >- /* Base - Reserved */ >- MOCS_ENTRY(1, 0x0, 0x0), > >+ /* NOTE: >+ * Reserved and unspecified MOCS indices have been set to (L3 + LCC). >+ * These reserved entry should never be used, they may be chanaged >+ * to low performant variants with better coherency in the future if >+ * more entries are needed. We are programming index I915_MOCS_PTE(1) >+ * only, __init_mocs_table() take care to prgramm unseud index with /* NOTE: * Reserved and unspecified MOCS indices have been set to (L3 + LCC). * These reserved entries should never be used, they may be changed * to low performant variants with better coherency in the future if * more entries are needed. We are programming index I915_MOCS_PTE(1) * only, __init_mocs_table() takes care to program unused index with Lucas De Marchi >+ * this entry. >+ */ >+ MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), >+ L3_3_WB), > GEN11_MOCS_ENTRIES, > > /* Implicitly enable L1 - HDC:L1 + L3 + LLC */ >@@ -265,6 +271,7 @@ static const struct drm_i915_mocs_entry tgl_mocs_table[] = { > MOCS_ENTRY(61, > LE_1_UC | LE_TC_1_LLC, > L3_3_WB), >+ > }; > > static const struct drm_i915_mocs_entry icl_mocs_table[] = { >-- >2.26.2 >
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c index 632e08a4592b2..c32f90bd56693 100644 --- a/drivers/gpu/drm/i915/gt/intel_mocs.c +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c @@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = { L3_1_UC) static const struct drm_i915_mocs_entry tgl_mocs_table[] = { - /* Base - Error (Reserved for Non-Use) */ - MOCS_ENTRY(0, 0x0, 0x0), - /* Base - Reserved */ - MOCS_ENTRY(1, 0x0, 0x0), + /* NOTE: + * Reserved and unspecified MOCS indices have been set to (L3 + LCC). + * These reserved entry should never be used, they may be chanaged + * to low performant variants with better coherency in the future if + * more entries are needed. We are programming index I915_MOCS_PTE(1) + * only, __init_mocs_table() take care to prgramm unseud index with + * this entry. + */ + MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), + L3_3_WB), GEN11_MOCS_ENTRIES, /* Implicitly enable L1 - HDC:L1 + L3 + LLC */ @@ -265,6 +271,7 @@ static const struct drm_i915_mocs_entry tgl_mocs_table[] = { MOCS_ENTRY(61, LE_1_UC | LE_TC_1_LLC, L3_3_WB), + }; static const struct drm_i915_mocs_entry icl_mocs_table[] = {
In order to avoid functional breakage of mis-programmed applications that have grown to depend on unused MOCS entries, we are programming those entries to be equal to fully cached ("L3 + LLC") entry. These reserved and unspecified entries should not be used as they may be changed to less performant variants with better coherency in the future if more entries are needed. V2: As suggested by Lucas "De Marchi" to utilise __init_mocs_table for programming default value, setting I915_MOCS_PTE index of tgl_mocs_table with desired value. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Tomasz Lis <tomasz.lis@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Francisco Jerez <currojerez@riseup.net> Cc: Mathew Alwin <alwin.mathew@intel.com> Cc: Mcguire Russell W <russell.w.mcguire@intel.com> Cc: Spruit Neil R <neil.r.spruit@intel.com> Cc: Zhou Cheng <cheng.zhou@intel.com> Cc: Benemelis Mike G <mike.g.benemelis@intel.com> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com> --- drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)