[3/4] drm/i915/fbc: Enable fbc on i865
diff mbox series

Message ID 20200702153723.24327-4-ville.syrjala@linux.intel.com
State New
Headers show
Series
  • drm/i915: FBC fixes
Related show

Commit Message

Ville Syrjälä July 2, 2020, 3:37 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Unlike all the other pre-snb desktop platforms i865 actually
supports FBC. Let's enable it.

Quote from the spec:
"DevSDG provides the same Run-Length Encoded Frame Buffer
 Compression (RLEFBC) function as exists in DevMGM."

As i865 only has the one pipe we want to skip massaging the
plane<->pipe assignment aimed at getting FBC+LVDS working on
the mobile platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c              | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

Comments

Souza, Jose July 2, 2020, 10:06 p.m. UTC | #1
On Thu, 2020-07-02 at 18:37 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Unlike all the other pre-snb desktop platforms i865 actually
> supports FBC. Let's enable it.
> 
> Quote from the spec:
> "DevSDG provides the same Run-Length Encoded Frame Buffer
>  Compression (RLEFBC) function as exists in DevMGM."
> 
> As i865 only has the one pipe we want to skip massaging the
> plane<->pipe assignment aimed at getting FBC+LVDS working on
> the mobile platforms.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c              | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 84e2a17b5ecb..653f6617d59a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16332,7 +16332,8 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	 * On gen2/3 only plane A can do FBC, but the panel fitter and LVDS
>  	 * port is hooked to pipe B. Hence we want plane A feeding pipe B.
>  	 */
> -	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) < 4)
> +	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) < 4 &&
> +	    INTEL_NUM_PIPES(dev_priv) == 2)
>  		plane->i9xx_plane = (enum i9xx_plane_id) !pipe;
>  	else
>  		plane->i9xx_plane = (enum i9xx_plane_id) pipe;
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index e5fdf17cd9cd..0be3b66ce666 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -217,6 +217,7 @@ static const struct intel_device_info i85x_info = {
>  static const struct intel_device_info i865g_info = {
>  	I845_FEATURES,
>  	PLATFORM(INTEL_I865G),
> +	.display.has_fbc = 1,
>  };
>  
>  #define GEN3_FEATURES \

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 84e2a17b5ecb..653f6617d59a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16332,7 +16332,8 @@  intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
 	 * On gen2/3 only plane A can do FBC, but the panel fitter and LVDS
 	 * port is hooked to pipe B. Hence we want plane A feeding pipe B.
 	 */
-	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) < 4)
+	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) < 4 &&
+	    INTEL_NUM_PIPES(dev_priv) == 2)
 		plane->i9xx_plane = (enum i9xx_plane_id) !pipe;
 	else
 		plane->i9xx_plane = (enum i9xx_plane_id) pipe;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e5fdf17cd9cd..0be3b66ce666 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -217,6 +217,7 @@  static const struct intel_device_info i85x_info = {
 static const struct intel_device_info i865g_info = {
 	I845_FEATURES,
 	PLATFORM(INTEL_I865G),
+	.display.has_fbc = 1,
 };
 
 #define GEN3_FEATURES \