| Message ID | 20200708131223.9519-3-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/i915: Move all FBC w/as to .init_clock_gating() | expand |
On Wed, 2020-07-08 at 16:12 +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Supposedly only skl/bxt need WaFbcHighMemBwCorruptionAvoidance. > Do not apply to the other gen9 platforms. Matches spec if not considering pre-production HW. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 8760e1ba1eee..7b98d0eb8597 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -98,10 +98,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv) > I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | > DISP_FBC_MEMORY_WAKE); > > - /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */ > - I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | > - ILK_DPFC_DISABLE_DUMMY0); > - > if (IS_SKYLAKE(dev_priv)) { > /* WaDisableDopClockGating */ > I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) > @@ -142,6 +138,10 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv) > /* WaFbcTurnOffFbcWatermark:bxt */ > I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | > DISP_FBC_WM_DIS); > + > + /* WaFbcHighMemBwCorruptionAvoidance:bxt */ > + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | > + ILK_DPFC_DISABLE_DUMMY0); > } > > static void glk_init_clock_gating(struct drm_i915_private *dev_priv) > @@ -7238,6 +7238,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv) > /* WaFbcNukeOnHostModify:skl */ > I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | > ILK_DPFC_NUKE_ON_ANY_MODIFICATION); > + > + /* WaFbcHighMemBwCorruptionAvoidance:skl */ > + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | > + ILK_DPFC_DISABLE_DUMMY0); > } > > static void bdw_init_clock_gating(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 8760e1ba1eee..7b98d0eb8597 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -98,10 +98,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv) I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | DISP_FBC_MEMORY_WAKE); - /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */ - I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | - ILK_DPFC_DISABLE_DUMMY0); - if (IS_SKYLAKE(dev_priv)) { /* WaDisableDopClockGating */ I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) @@ -142,6 +138,10 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv) /* WaFbcTurnOffFbcWatermark:bxt */ I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); + + /* WaFbcHighMemBwCorruptionAvoidance:bxt */ + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | + ILK_DPFC_DISABLE_DUMMY0); } static void glk_init_clock_gating(struct drm_i915_private *dev_priv) @@ -7238,6 +7238,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv) /* WaFbcNukeOnHostModify:skl */ I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | ILK_DPFC_NUKE_ON_ANY_MODIFICATION); + + /* WaFbcHighMemBwCorruptionAvoidance:skl */ + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | + ILK_DPFC_DISABLE_DUMMY0); } static void bdw_init_clock_gating(struct drm_i915_private *dev_priv)