Message ID | 20200708141856.15776-10-eric.auger@redhat.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | SMMUv3.2 Range-based TLB Invalidation Support | expand |
On Wed, 8 Jul 2020 at 15:20, Eric Auger <eric.auger@redhat.com> wrote: > > Add the support for AIDR register. It currently advertises > SMMU V3.0 spec. > > Signed-off-by: Eric Auger <eric.auger@redhat.com> > > --- > --- > hw/arm/smmuv3-internal.h | 1 + > include/hw/arm/smmuv3.h | 1 + > hw/arm/smmuv3.c | 3 +++ > 3 files changed, 5 insertions(+) > > diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h > index ef093eaff5..6296235020 100644 > --- a/hw/arm/smmuv3-internal.h > +++ b/hw/arm/smmuv3-internal.h > @@ -64,6 +64,7 @@ REG32(IDR5, 0x14) > #define SMMU_IDR5_OAS 4 > > REG32(IIDR, 0x18) > +REG32(AIDR, 0x1C) Rest of file uses lowercase letters for hex values, so "0x1c". > REG32(CR0, 0x20) > FIELD(CR0, SMMU_ENABLE, 0, 1) > FIELD(CR0, EVENTQEN, 2, 1) Otherwise Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index ef093eaff5..6296235020 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -64,6 +64,7 @@ REG32(IDR5, 0x14) #define SMMU_IDR5_OAS 4 REG32(IIDR, 0x18) +REG32(AIDR, 0x1C) REG32(CR0, 0x20) FIELD(CR0, SMMU_ENABLE, 0, 1) FIELD(CR0, EVENTQEN, 2, 1) diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index 36b2f45253..68d7a963e0 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -41,6 +41,7 @@ typedef struct SMMUv3State { uint32_t idr[6]; uint32_t iidr; + uint32_t aidr; uint32_t cr[3]; uint32_t cr0ack; uint32_t statusr; diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 89ab11fc36..718f28462e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1251,6 +1251,9 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr offset, case A_IIDR: *data = s->iidr; return MEMTX_OK; + case A_AIDR: + *data = s->aidr; + return MEMTX_OK; case A_CR0: *data = s->cr[0]; return MEMTX_OK;
Add the support for AIDR register. It currently advertises SMMU V3.0 spec. Signed-off-by: Eric Auger <eric.auger@redhat.com> --- --- hw/arm/smmuv3-internal.h | 1 + include/hw/arm/smmuv3.h | 1 + hw/arm/smmuv3.c | 3 +++ 3 files changed, 5 insertions(+)