[v3,3/4] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
diff mbox series

Message ID 1594292674-15632-4-git-send-email-rnayak@codeaurora.org
State New
Headers show
Series
  • DVFS support for dpu and dsi
Related show

Commit Message

Rajendra Nayak July 9, 2020, 11:04 a.m. UTC
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 ++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

Comments

Rob Clark July 17, 2020, 5:47 p.m. UTC | #1
On Thu, Jul 9, 2020 at 4:05 AM Rajendra Nayak <rnayak@codeaurora.org> wrote:
>
> Add the OPP tables for DSI and MDP based on the perf state/clk
> requirements, and add the power-domains property to specify the
> scalable power domain.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

Tested-by: Rob Clark <robdclark@gmail.com>

Bjorn, the two driver patches are queued up in msm-next, I assume
you'll pickup the two dt patches?

BR,
-R

> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index fee50d9..3efdd70 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -3296,6 +3296,35 @@
>                         #power-domain-cells = <1>;
>                 };
>
> +               dsi_opp_table: dsi-opp-table {
> +                       compatible = "operating-points-v2";
> +
> +                       opp-19200000 {
> +                               opp-hz = /bits/ 64 <19200000>;
> +                               required-opps = <&rpmhpd_opp_min_svs>;
> +                       };
> +
> +                       opp-180000000 {
> +                               opp-hz = /bits/ 64 <180000000>;
> +                               required-opps = <&rpmhpd_opp_low_svs>;
> +                       };
> +
> +                       opp-275000000 {
> +                               opp-hz = /bits/ 64 <275000000>;
> +                               required-opps = <&rpmhpd_opp_svs>;
> +                       };
> +
> +                       opp-328580000 {
> +                               opp-hz = /bits/ 64 <328580000>;
> +                               required-opps = <&rpmhpd_opp_svs_l1>;
> +                       };
> +
> +                       opp-358000000 {
> +                               opp-hz = /bits/ 64 <358000000>;
> +                               required-opps = <&rpmhpd_opp_nom>;
> +                       };
> +               };
> +
>                 mdss: mdss@ae00000 {
>                         compatible = "qcom,sdm845-mdss";
>                         reg = <0 0x0ae00000 0 0x1000>;
> @@ -3340,6 +3369,8 @@
>                                                   <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
>                                 assigned-clock-rates = <300000000>,
>                                                        <19200000>;
> +                               operating-points-v2 = <&mdp_opp_table>;
> +                               power-domains = <&rpmhpd SDM845_CX>;
>
>                                 interrupt-parent = <&mdss>;
>                                 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> @@ -3364,6 +3395,30 @@
>                                                 };
>                                         };
>                                 };
> +
> +                               mdp_opp_table: mdp-opp-table {
> +                                       compatible = "operating-points-v2";
> +
> +                                       opp-19200000 {
> +                                               opp-hz = /bits/ 64 <19200000>;
> +                                               required-opps = <&rpmhpd_opp_min_svs>;
> +                                       };
> +
> +                                       opp-171428571 {
> +                                               opp-hz = /bits/ 64 <171428571>;
> +                                               required-opps = <&rpmhpd_opp_low_svs>;
> +                                       };
> +
> +                                       opp-344000000 {
> +                                               opp-hz = /bits/ 64 <344000000>;
> +                                               required-opps = <&rpmhpd_opp_svs_l1>;
> +                                       };
> +
> +                                       opp-430000000 {
> +                                               opp-hz = /bits/ 64 <430000000>;
> +                                               required-opps = <&rpmhpd_opp_nom>;
> +                                       };
> +                               };
>                         };
>
>                         dsi0: dsi@ae94000 {
> @@ -3386,6 +3441,8 @@
>                                               "core",
>                                               "iface",
>                                               "bus";
> +                               operating-points-v2 = <&dsi_opp_table>;
> +                               power-domains = <&rpmhpd SDM845_CX>;
>
>                                 phys = <&dsi0_phy>;
>                                 phy-names = "dsi";
> @@ -3450,6 +3507,8 @@
>                                               "core",
>                                               "iface",
>                                               "bus";
> +                               operating-points-v2 = <&dsi_opp_table>;
> +                               power-domains = <&rpmhpd SDM845_CX>;
>
>                                 phys = <&dsi1_phy>;
>                                 phy-names = "dsi";
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index fee50d9..3efdd70 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3296,6 +3296,35 @@ 
 			#power-domain-cells = <1>;
 		};
 
+		dsi_opp_table: dsi-opp-table {
+			compatible = "operating-points-v2";
+
+			opp-19200000 {
+				opp-hz = /bits/ 64 <19200000>;
+				required-opps = <&rpmhpd_opp_min_svs>;
+			};
+
+			opp-180000000 {
+				opp-hz = /bits/ 64 <180000000>;
+				required-opps = <&rpmhpd_opp_low_svs>;
+			};
+
+			opp-275000000 {
+				opp-hz = /bits/ 64 <275000000>;
+				required-opps = <&rpmhpd_opp_svs>;
+			};
+
+			opp-328580000 {
+				opp-hz = /bits/ 64 <328580000>;
+				required-opps = <&rpmhpd_opp_svs_l1>;
+			};
+
+			opp-358000000 {
+				opp-hz = /bits/ 64 <358000000>;
+				required-opps = <&rpmhpd_opp_nom>;
+			};
+		};
+
 		mdss: mdss@ae00000 {
 			compatible = "qcom,sdm845-mdss";
 			reg = <0 0x0ae00000 0 0x1000>;
@@ -3340,6 +3369,8 @@ 
 						  <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
 				assigned-clock-rates = <300000000>,
 						       <19200000>;
+				operating-points-v2 = <&mdp_opp_table>;
+				power-domains = <&rpmhpd SDM845_CX>;
 
 				interrupt-parent = <&mdss>;
 				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
@@ -3364,6 +3395,30 @@ 
 						};
 					};
 				};
+
+				mdp_opp_table: mdp-opp-table {
+					compatible = "operating-points-v2";
+
+					opp-19200000 {
+						opp-hz = /bits/ 64 <19200000>;
+						required-opps = <&rpmhpd_opp_min_svs>;
+					};
+
+					opp-171428571 {
+						opp-hz = /bits/ 64 <171428571>;
+						required-opps = <&rpmhpd_opp_low_svs>;
+					};
+
+					opp-344000000 {
+						opp-hz = /bits/ 64 <344000000>;
+						required-opps = <&rpmhpd_opp_svs_l1>;
+					};
+
+					opp-430000000 {
+						opp-hz = /bits/ 64 <430000000>;
+						required-opps = <&rpmhpd_opp_nom>;
+					};
+				};
 			};
 
 			dsi0: dsi@ae94000 {
@@ -3386,6 +3441,8 @@ 
 					      "core",
 					      "iface",
 					      "bus";
+				operating-points-v2 = <&dsi_opp_table>;
+				power-domains = <&rpmhpd SDM845_CX>;
 
 				phys = <&dsi0_phy>;
 				phy-names = "dsi";
@@ -3450,6 +3507,8 @@ 
 					      "core",
 					      "iface",
 					      "bus";
+				operating-points-v2 = <&dsi_opp_table>;
+				power-domains = <&rpmhpd SDM845_CX>;
 
 				phys = <&dsi1_phy>;
 				phy-names = "dsi";