[v4,3/7] drm: msm: a6xx: set gpu freq through hfi
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Message ID 1594324828-9571-4-git-send-email-akhilpo@codeaurora.org
State New
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Series
  • Add support for GPU DDR BW scaling
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Commit Message

Akhil P Oommen July 9, 2020, 8 p.m. UTC
Newer targets support changing gpu frequency through HFI. So
use that wherever supported instead of the legacy method.

Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

Comments

Jonathan Marek July 9, 2020, 8:04 p.m. UTC | #1
On 7/9/20 4:00 PM, Akhil P Oommen wrote:
> Newer targets support changing gpu frequency through HFI. So
> use that wherever supported instead of the legacy method.
> 

It was already using HFI on newer targets. Don't break it in one commit 
then fix it in the next.

> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
> ---
>   drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++----
>   1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index 233afea..b547339 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -121,6 +121,12 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
>   		if (gpu_freq == gmu->gpu_freqs[perf_index])
>   			break;
>   
> +	if (!gmu->legacy) {
> +		a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
> +		icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
> +		return;
> +	}
> +
>   	gmu->current_perf_index = perf_index;
>   	gmu->freq = gmu->gpu_freqs[perf_index];
>   
> @@ -893,10 +899,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
>   	enable_irq(gmu->hfi_irq);
>   
>   	/* Set the GPU to the current freq */
> -	if (gmu->legacy)
> -		a6xx_gmu_set_initial_freq(gpu, gmu);
> -	else
> -		a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
> +	a6xx_gmu_set_initial_freq(gpu, gmu);
>   
>   	/*
>   	 * "enable" the GX power domain which won't actually do anything but it
>
Akhil P Oommen July 10, 2020, 9:13 p.m. UTC | #2
On 7/10/2020 1:34 AM, Jonathan Marek wrote:
> On 7/9/20 4:00 PM, Akhil P Oommen wrote:
>> Newer targets support changing gpu frequency through HFI. So
>> use that wherever supported instead of the legacy method.
>>
>
> It was already using HFI on newer targets. Don't break it in one 
> commit then fix it in the next.

Oops. I somehow got confused. Will fix and resend.

-Akhil

>
>> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
>> ---
>>   drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++----
>>   1 file changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c 
>> b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>> index 233afea..b547339 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>> @@ -121,6 +121,12 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, 
>> struct dev_pm_opp *opp)
>>           if (gpu_freq == gmu->gpu_freqs[perf_index])
>>               break;
>>   +    if (!gmu->legacy) {
>> +        a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
>> +        icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
>> +        return;
>> +    }
>> +
>>       gmu->current_perf_index = perf_index;
>>       gmu->freq = gmu->gpu_freqs[perf_index];
>>   @@ -893,10 +899,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
>>       enable_irq(gmu->hfi_irq);
>>         /* Set the GPU to the current freq */
>> -    if (gmu->legacy)
>> -        a6xx_gmu_set_initial_freq(gpu, gmu);
>> -    else
>> -        a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
>> +    a6xx_gmu_set_initial_freq(gpu, gmu);
>>         /*
>>        * "enable" the GX power domain which won't actually do 
>> anything but it
>>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Akhil P Oommen July 10, 2020, 10:36 p.m. UTC | #3
On 7/11/2020 2:43 AM, Akhil P Oommen wrote:
>
> On 7/10/2020 1:34 AM, Jonathan Marek wrote:
>> On 7/9/20 4:00 PM, Akhil P Oommen wrote:
>>> Newer targets support changing gpu frequency through HFI. So
>>> use that wherever supported instead of the legacy method.
>>>
>>
>> It was already using HFI on newer targets. Don't break it in one 
>> commit then fix it in the next.
>
> Oops. I somehow got confused. Will fix and resend.
>
> -Akhil

I broke the pm_runtime_get_if_in_use() check too. Other than that, just 
squashing this patch with the previous one should be enough.

-Akhil.

>
>>
>>> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
>>> ---
>>>   drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++----
>>>   1 file changed, 7 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c 
>>> b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>>> index 233afea..b547339 100644
>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
>>> @@ -121,6 +121,12 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, 
>>> struct dev_pm_opp *opp)
>>>           if (gpu_freq == gmu->gpu_freqs[perf_index])
>>>               break;
>>>   +    if (!gmu->legacy) {
>>> +        a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
>>> +        icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
>>> +        return;
>>> +    }
>>> +
>>>       gmu->current_perf_index = perf_index;
>>>       gmu->freq = gmu->gpu_freqs[perf_index];
>>>   @@ -893,10 +899,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
>>>       enable_irq(gmu->hfi_irq);
>>>         /* Set the GPU to the current freq */
>>> -    if (gmu->legacy)
>>> -        a6xx_gmu_set_initial_freq(gpu, gmu);
>>> -    else
>>> -        a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
>>> +    a6xx_gmu_set_initial_freq(gpu, gmu);
>>>         /*
>>>        * "enable" the GX power domain which won't actually do 
>>> anything but it
>>>
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

Patch
diff mbox series

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 233afea..b547339 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -121,6 +121,12 @@  void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
 		if (gpu_freq == gmu->gpu_freqs[perf_index])
 			break;
 
+	if (!gmu->legacy) {
+		a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
+		icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
+		return;
+	}
+
 	gmu->current_perf_index = perf_index;
 	gmu->freq = gmu->gpu_freqs[perf_index];
 
@@ -893,10 +899,7 @@  int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
 	enable_irq(gmu->hfi_irq);
 
 	/* Set the GPU to the current freq */
-	if (gmu->legacy)
-		a6xx_gmu_set_initial_freq(gpu, gmu);
-	else
-		a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
+	a6xx_gmu_set_initial_freq(gpu, gmu);
 
 	/*
 	 * "enable" the GX power domain which won't actually do anything but it