spi: spi-cadence: add support for chip select high
diff mbox series

Message ID 20200710045140.458-1-shreyas.joshi@biamp.com
State Superseded
Headers show
Series
  • spi: spi-cadence: add support for chip select high
Related show

Commit Message

Shreyas Joshi July 10, 2020, 4:51 a.m. UTC
spi cadence driver should support spi-cs-high in mode bits
so that the peripherals that needs the chip select to be high active can
use it. Add the SPI-CS-HIGH flag in the supported mode bits.

Signed-off-by: Shreyas Joshi <shreyas.joshi@biamp.com>
---
 drivers/spi/spi-cadence.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Mark Brown July 10, 2020, 3:35 p.m. UTC | #1
On Fri, Jul 10, 2020 at 02:51:40PM +1000, Shreyas Joshi wrote:

> spi cadence driver should support spi-cs-high in mode bits
> so that the peripherals that needs the chip select to be high active can
> use it. Add the SPI-CS-HIGH flag in the supported mode bits.

This doesn't apply against current code, please check and resend:

HEAD is now at 3ea4eac3e29f SPI SUBSYSTEM: Replace HTTP links with HTTPS ones
Applying: spi: spi-cadence: add support for chip select high
error: corrupt patch at line 18
error: could not build fake ancestor
Patch failed at 0001 spi: spi-cadence: add support for chip select high

Patch
diff mbox series

diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c
index 82a0ee09cbe1..2b6b9c1ad9d0 100644
--- a/drivers/spi/spi-cadence.c
+++ b/drivers/spi/spi-cadence.c
@@ -556,7 +556,7 @@  static int cdns_spi_probe(struct platform_device *pdev)
 	master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware;
 	master->set_cs = cdns_spi_chipselect;
 	master->auto_runtime_pm = true;
-	master->mode_bits = SPI_CPOL | SPI_CPHA;
+	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
 	/* Set to default valid value */
 	master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;
--
2.20.1