[RFC,03/60] drm/i915/dg1: Add DG1 PCI IDs
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Message ID 20200710115757.290984-4-matthew.auld@intel.com
State New
Headers show
Series
  • DG1 LMEM enabling
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Commit Message

Matthew Auld July 10, 2020, 11:57 a.m. UTC
From: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>

Add the PCI ID for DG1, but keep it out of the table we use to register
the driver. At this point we can't consider the driver ready to bind to
the device since we basically miss support for everything. When more
support is merged we can enable it to work partially for example as a
display-only driver.

v2: remove DG1 from the pci table and reword commit message (Lucas)

Bspec: 44463

Cc: Matthew Auld <matthew.auld@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com> # v1
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: kernel test robot <lkp@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 2 +-
 include/drm/i915_pciids.h       | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f5af72521de6..85e2557563cf 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -901,7 +901,7 @@  static const struct intel_device_info rkl_info = {
 	.has_master_unit_irq = 1, \
 	.is_dgfx = 1
 
-static const struct intel_device_info intel_dg1_info = {
+static const struct intel_device_info dg1_info = {
 	GEN12_DGFX_FEATURES,
 	PLATFORM(INTEL_DG1),
 	.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index d6cb28992ba0..96e408b4bdc9 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -618,4 +618,8 @@ 
 	INTEL_VGA_DEVICE(0x4C90, info), \
 	INTEL_VGA_DEVICE(0x4C9A, info)
 
+/* DG1 */
+#define INTEL_DG1_IDS(info) \
+	INTEL_VGA_DEVICE(0x4905, info)
+
 #endif /* _I915_PCIIDS_H */