[v2,1/2] ARM: dts: imx6qdl-sabresd: Add an mdio node
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Message ID 20200713130416.20040-1-festevam@gmail.com
State New
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  • [v2,1/2] ARM: dts: imx6qdl-sabresd: Add an mdio node
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Commit Message

Fabio Estevam July 13, 2020, 1:04 p.m. UTC
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.

The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.

Improve the Ethernet representation by adding an mdio node with such
information.

An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- None. Only inverted the order of the patches

 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Soeren Moch July 14, 2020, 9:49 a.m. UTC | #1
On 13.07.20 15:04, Fabio Estevam wrote:
> imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
>
> The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
>
> Improve the Ethernet representation by adding an mdio node with such
> information.
>
> An advantage of adding the mdio node is that the AR8031 initialization
> code in the mx6sabresd board file in U-Boot can totally be removed.
>
> Signed-off-by: Fabio Estevam <festevam@gmail.com>

Reviewed-by: Soeren Moch <smoch@web.de>

Thanks,
Soeren

> ---
> Changes since v1:
> - None. Only inverted the order of the patches
>
>  arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> index 28b35ccb3757..6524ad4b0010 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
> @@ -203,9 +203,20 @@
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_enet>;
>  	phy-mode = "rgmii-id";
> +	phy-handle = <&phy>;
>  	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
>  	fsl,magic-packet;
>  	status = "okay";
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		phy: ethernet-phy@1 {
> +			reg = <1>;
> +			qca,clk-out-frequency = <125000000>;
> +		};
> +	};
>  };
>
>  &hdmi {
Shawn Guo July 20, 2020, 2:19 a.m. UTC | #2
On Mon, Jul 13, 2020 at 10:04:15AM -0300, Fabio Estevam wrote:
> imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
> 
> The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
> 
> Improve the Ethernet representation by adding an mdio node with such
> information.
> 
> An advantage of adding the mdio node is that the AR8031 initialization
> code in the mx6sabresd board file in U-Boot can totally be removed.
> 
> Signed-off-by: Fabio Estevam <festevam@gmail.com>

Applied both, thanks.

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 28b35ccb3757..6524ad4b0010 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -203,9 +203,20 @@ 
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii-id";
+	phy-handle = <&phy>;
 	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 	fsl,magic-packet;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: ethernet-phy@1 {
+			reg = <1>;
+			qca,clk-out-frequency = <125000000>;
+		};
+	};
 };
 
 &hdmi {