[TEGRA194_CPUFREQ,v6,1/4] dt-bindings: arm: Add NVIDIA Tegra194 CPU Complex binding
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Message ID 1594742870-19957-1-git-send-email-sumitg@nvidia.com
State New
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  • [TEGRA194_CPUFREQ,v6,1/4] dt-bindings: arm: Add NVIDIA Tegra194 CPU Complex binding
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Commit Message

Sumit Gupta July 14, 2020, 4:07 p.m. UTC
Add device-tree binding documentation to represent Tegra194
CPU Complex with compatible string under 'cpus' node. This
can be used by drivers like cpufreq which don't have their
node or CPU Complex node to bind to. Also, documenting
'nvidia,bpmp' property which points to BPMP device.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
 .../bindings/arm/nvidia,tegra194-ccplex.yaml       | 106 +++++++++++++++++++++
 1 file changed, 106 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml

Comments

Rob Herring July 14, 2020, 8:47 p.m. UTC | #1
On Tue, Jul 14, 2020 at 09:37:50PM +0530, Sumit Gupta wrote:
> Add device-tree binding documentation to represent Tegra194
> CPU Complex with compatible string under 'cpus' node. This
> can be used by drivers like cpufreq which don't have their
> node or CPU Complex node to bind to. Also, documenting
> 'nvidia,bpmp' property which points to BPMP device.
> 
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> ---
>  .../bindings/arm/nvidia,tegra194-ccplex.yaml       | 106 +++++++++++++++++++++
>  1 file changed, 106 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
> new file mode 100644
> index 0000000..06dbdaa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
> @@ -0,0 +1,106 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license please.

> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: NVIDIA Tegra194 CPU Complex device tree bindings
> +
> +maintainers:
> +  - Thierry Reding <thierry.reding@gmail.com>
> +  - Jonathan Hunter <jonathanh@nvidia.com>
> +  - Sumit Gupta <sumitg@nvidia.com>
> +
> +description: |+
> +  Tegra194 SOC has homogeneous architecture where each cluster has two
> +  symmetric cores. Compatible string in "cpus" node represents the CPU
> +  Complex having all clusters.
> +
> +properties:

$nodename:
  const: cpus

> +  compatible:
> +    enum:
> +      - nvidia,tegra194-ccplex
> +
> +  nvidia,bpmp:
> +    $ref: '/schemas/types.yaml#/definitions/phandle'
> +    description: |
> +      Specifies the bpmp node that needs to be queried to get
> +      operating point data for all CPUs.
> +
> +      Optional for systems that have a "compatible"
> +      property value of "nvidia,tegra194-ccplex".

The schema says this already.

> +
> +  "#address-cells":
> +    const: 1

This is wrong. The binding says it's 2 cells on aarch64 cpus though we 
don't enforce that.

> +
> +  "#size-cells":
> +    const: 0
> +
> +dependencies:
> +  nvidia,bpmp: [compatible]

This is kind of redundant as 'compatible' is required in order to apply 
the schema.

> +
> +examples:
> +  - |
> +    cpus {
> +      compatible = "nvidia,tegra194-ccplex";
> +      nvidia,bpmp = <&bpmp>;
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +
> +      cpu0_0: cpu@0 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x0>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu0_1: cpu@1 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x001>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu1_0: cpu@100 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x100>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu1_1: cpu@101 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x101>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu2_0: cpu@200 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x200>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu2_1: cpu@201 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x201>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu3_0: cpu@300 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x300>;
> +        enable-method = "psci";
> +      };
> +
> +      cpu3_1: cpu@301 {
> +        compatible = "nvidia,tegra194-carmel";
> +        device_type = "cpu";
> +        reg = <0x301>;
> +        enable-method = "psci";
> +       };

Not really that useful describing all these cpus.

> +    };
> +...
> -- 
> 2.7.4
>
Sumit Gupta July 15, 2020, 10:22 a.m. UTC | #2
Thank you for the review.

>> Add device-tree binding documentation to represent Tegra194
>> CPU Complex with compatible string under 'cpus' node. This
>> can be used by drivers like cpufreq which don't have their
>> node or CPU Complex node to bind to. Also, documenting
>> 'nvidia,bpmp' property which points to BPMP device.
>>
>> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
>> ---
>>   .../bindings/arm/nvidia,tegra194-ccplex.yaml       | 106 +++++++++++++++++++++
>>   1 file changed, 106 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
>> new file mode 100644
>> index 0000000..06dbdaa
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
>> @@ -0,0 +1,106 @@
>> +# SPDX-License-Identifier: GPL-2.0
> 
> Dual license please.
> 
Ok.

>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: NVIDIA Tegra194 CPU Complex device tree bindings
>> +
>> +maintainers:
>> +  - Thierry Reding <thierry.reding@gmail.com>
>> +  - Jonathan Hunter <jonathanh@nvidia.com>
>> +  - Sumit Gupta <sumitg@nvidia.com>
>> +
>> +description: |+
>> +  Tegra194 SOC has homogeneous architecture where each cluster has two
>> +  symmetric cores. Compatible string in "cpus" node represents the CPU
>> +  Complex having all clusters.
>> +
>> +properties:
> 
> $nodename:
>    const: cpus
> 
Ok.

>> +  compatible:
>> +    enum:
>> +      - nvidia,tegra194-ccplex
>> +
>> +  nvidia,bpmp:
>> +    $ref: '/schemas/types.yaml#/definitions/phandle'
>> +    description: |
>> +      Specifies the bpmp node that needs to be queried to get
>> +      operating point data for all CPUs.
>> +
>> +      Optional for systems that have a "compatible"
>> +      property value of "nvidia,tegra194-ccplex".
> 
> The schema says this already.
> 
Removed this text from here.

>> +
>> +  "#address-cells":
>> +    const: 1
> 
> This is wrong. The binding says it's 2 cells on aarch64 cpus though we
> don't enforce that.
>Removed.

>> +
>> +  "#size-cells":
>> +    const: 0
>> +
>> +dependencies:
>> +  nvidia,bpmp: [compatible]
> 
> This is kind of redundant as 'compatible' is required in order to apply
> the schema.
>
Removed this as well.

>> +
>> +examples:
>> +  - |
>> +    cpus {
>> +      compatible = "nvidia,tegra194-ccplex";
>> +      nvidia,bpmp = <&bpmp>;
>> +      #address-cells = <1>;
>> +      #size-cells = <0>;
>> +
>> +      cpu0_0: cpu@0 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x0>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu0_1: cpu@1 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x001>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu1_0: cpu@100 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x100>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu1_1: cpu@101 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x101>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu2_0: cpu@200 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x200>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu2_1: cpu@201 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x201>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu3_0: cpu@300 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x300>;
>> +        enable-method = "psci";
>> +      };
>> +
>> +      cpu3_1: cpu@301 {
>> +        compatible = "nvidia,tegra194-carmel";
>> +        device_type = "cpu";
>> +        reg = <0x301>;
>> +        enable-method = "psci";
>> +       };
> 
> Not really that useful describing all these cpus.
> 
Ok. Kept first four cpu nodes only.

>> +    };
>> +...
>> --
>> 2.7.4
>>

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
new file mode 100644
index 0000000..06dbdaa
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
@@ -0,0 +1,106 @@ 
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: NVIDIA Tegra194 CPU Complex device tree bindings
+
+maintainers:
+  - Thierry Reding <thierry.reding@gmail.com>
+  - Jonathan Hunter <jonathanh@nvidia.com>
+  - Sumit Gupta <sumitg@nvidia.com>
+
+description: |+
+  Tegra194 SOC has homogeneous architecture where each cluster has two
+  symmetric cores. Compatible string in "cpus" node represents the CPU
+  Complex having all clusters.
+
+properties:
+  compatible:
+    enum:
+      - nvidia,tegra194-ccplex
+
+  nvidia,bpmp:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description: |
+      Specifies the bpmp node that needs to be queried to get
+      operating point data for all CPUs.
+
+      Optional for systems that have a "compatible"
+      property value of "nvidia,tegra194-ccplex".
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+dependencies:
+  nvidia,bpmp: [compatible]
+
+examples:
+  - |
+    cpus {
+      compatible = "nvidia,tegra194-ccplex";
+      nvidia,bpmp = <&bpmp>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      cpu0_0: cpu@0 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x0>;
+        enable-method = "psci";
+      };
+
+      cpu0_1: cpu@1 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x001>;
+        enable-method = "psci";
+      };
+
+      cpu1_0: cpu@100 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x100>;
+        enable-method = "psci";
+      };
+
+      cpu1_1: cpu@101 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x101>;
+        enable-method = "psci";
+      };
+
+      cpu2_0: cpu@200 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x200>;
+        enable-method = "psci";
+      };
+
+      cpu2_1: cpu@201 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x201>;
+        enable-method = "psci";
+      };
+
+      cpu3_0: cpu@300 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x300>;
+        enable-method = "psci";
+      };
+
+      cpu3_1: cpu@301 {
+        compatible = "nvidia,tegra194-carmel";
+        device_type = "cpu";
+        reg = <0x301>;
+        enable-method = "psci";
+       };
+    };
+...