[13/20] drm/i915: Add gamma/degamm readout for ivb/hsw
diff mbox series

Message ID 20200717211345.26851-14-ville.syrjala@linux.intel.com
State New
Headers show
Series
  • drm/i915: Finish (de)gamma readout
Related show

Commit Message

Ville Syrjälä July 17, 2020, 9:13 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We now have all the code necessary for gamma/degamma readout on
ivb/hsw. Plug it all in.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

Shankar, Uma Sept. 17, 2020, 8:46 p.m. UTC | #1
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, July 18, 2020 2:44 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 13/20] drm/i915: Add gamma/degamm readout for

Typo in degamma.
With this fixed,
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> ivb/hsw
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We now have all the code necessary for gamma/degamma readout on ivb/hsw.
> Plug it all in.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_color.c | 32 ++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 9f01fb316efa..886f3f0d873a 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1999,6 +1999,37 @@ static struct drm_property_blob
> *ivb_read_lut_10(struct intel_crtc *crtc,
>  	return blob;
>  }
> 
> +static void ivb_read_luts(struct intel_crtc_state *crtc_state) {
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_property_blob **blob =
> +		crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA ?
> +		&crtc_state->hw.gamma_lut : &crtc_state->hw.degamma_lut;
> +
> +	if (!crtc_state->gamma_enable)
> +		return;
> +
> +	switch (crtc_state->gamma_mode) {
> +	case GAMMA_MODE_MODE_8BIT:
> +		*blob = ilk_read_lut_8(crtc);
> +		break;
> +	case GAMMA_MODE_MODE_SPLIT:
> +		crtc_state->hw.degamma_lut =
> +			ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |
> +					PAL_PREC_INDEX_VALUE(0));
> +		crtc_state->hw.gamma_lut =
> +			ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |
> +					PAL_PREC_INDEX_VALUE(512));
> +		break;
> +	case GAMMA_MODE_MODE_10BIT:
> +		*blob = ivb_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));
> +		break;
> +	default:
> +		MISSING_CASE(crtc_state->gamma_mode);
> +		break;
> +	}
> +}
> +
>  /* On BDW+ the index auto increment mode actually works */  static struct
> drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc,
>  						 u32 prec_index)
> @@ -2236,6 +2267,7 @@ void intel_color_init(struct intel_crtc *crtc)
>  			dev_priv->display.read_luts = bdw_read_luts;
>  		} else if (INTEL_GEN(dev_priv) >= 7) {
>  			dev_priv->display.load_luts = ivb_load_luts;
> +			dev_priv->display.read_luts = ivb_read_luts;
>  		} else {
>  			dev_priv->display.load_luts = ilk_load_luts;
>  			dev_priv->display.read_luts = ilk_read_luts;
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 9f01fb316efa..886f3f0d873a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1999,6 +1999,37 @@  static struct drm_property_blob *ivb_read_lut_10(struct intel_crtc *crtc,
 	return blob;
 }
 
+static void ivb_read_luts(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_property_blob **blob =
+		crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA ?
+		&crtc_state->hw.gamma_lut : &crtc_state->hw.degamma_lut;
+
+	if (!crtc_state->gamma_enable)
+		return;
+
+	switch (crtc_state->gamma_mode) {
+	case GAMMA_MODE_MODE_8BIT:
+		*blob = ilk_read_lut_8(crtc);
+		break;
+	case GAMMA_MODE_MODE_SPLIT:
+		crtc_state->hw.degamma_lut =
+			ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |
+					PAL_PREC_INDEX_VALUE(0));
+		crtc_state->hw.gamma_lut =
+			ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE |
+					PAL_PREC_INDEX_VALUE(512));
+		break;
+	case GAMMA_MODE_MODE_10BIT:
+		*blob = ivb_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0));
+		break;
+	default:
+		MISSING_CASE(crtc_state->gamma_mode);
+		break;
+	}
+}
+
 /* On BDW+ the index auto increment mode actually works */
 static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc,
 						 u32 prec_index)
@@ -2236,6 +2267,7 @@  void intel_color_init(struct intel_crtc *crtc)
 			dev_priv->display.read_luts = bdw_read_luts;
 		} else if (INTEL_GEN(dev_priv) >= 7) {
 			dev_priv->display.load_luts = ivb_load_luts;
+			dev_priv->display.read_luts = ivb_read_luts;
 		} else {
 			dev_priv->display.load_luts = ilk_load_luts;
 			dev_priv->display.read_luts = ilk_read_luts;