[v1,3/3] arm64: defconfig: Enable imx8mq-librem5-devkit display stack
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Message ID a98acb7a0ed2ee6af78ba08354740d69b63b8c53.1596025057.git.agx@sigxcpu.org
State New
Headers show
Series
  • arm64: dts: imx8mq: Add NWL DSI host controller to Librem 5 Devkit
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Commit Message

Guido Günther July 29, 2020, 12:19 p.m. UTC
Enable the panel, NWL DSI host controller and dphy. This
also needs the reset controller.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
 arch/arm64/configs/defconfig | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Fabio Estevam Aug. 20, 2020, 4:11 a.m. UTC | #1
Hi Guido,

On Wed, Jul 29, 2020 at 9:19 AM Guido Günther <agx@sigxcpu.org> wrote:
>
> Enable the panel, NWL DSI host controller and dphy. This
> also needs the reset controller.
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> ---
>  arch/arm64/configs/defconfig | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index e0f33826819f..608019f6408d 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -640,10 +640,12 @@ CONFIG_DRM_MSM=m
>  CONFIG_DRM_TEGRA=m
>  CONFIG_DRM_PANEL_LVDS=m
>  CONFIG_DRM_PANEL_SIMPLE=m
> -CONFIG_DRM_SIMPLE_BRIDGE=m
> +CONFIG_DRM_PANEL_SITRONIX_ST7703=m
>  CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
>  CONFIG_DRM_DISPLAY_CONNECTOR=m
> +CONFIG_DRM_NWL_MIPI_DSI=m
>  CONFIG_DRM_SII902X=m
> +CONFIG_DRM_SIMPLE_BRIDGE=m

One nit: I suppose the CONFIG_DRM_SIMPLE_BRIDGE=m move comes from a
defconfig re-sync.

Maybe this re-sync could be part of a separate patch?

Thanks for adding these options to the defconfig so that we could have
MIPI DSI working by default on i.MX8M:

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Guido Günther Aug. 20, 2020, 8:52 a.m. UTC | #2
Hi Fabio,
On Thu, Aug 20, 2020 at 01:11:28AM -0300, Fabio Estevam wrote:
> Hi Guido,
> 
> On Wed, Jul 29, 2020 at 9:19 AM Guido Günther <agx@sigxcpu.org> wrote:
> >
> > Enable the panel, NWL DSI host controller and dphy. This
> > also needs the reset controller.
> >
> > Signed-off-by: Guido Günther <agx@sigxcpu.org>
> > ---
> >  arch/arm64/configs/defconfig | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> > index e0f33826819f..608019f6408d 100644
> > --- a/arch/arm64/configs/defconfig
> > +++ b/arch/arm64/configs/defconfig
> > @@ -640,10 +640,12 @@ CONFIG_DRM_MSM=m
> >  CONFIG_DRM_TEGRA=m
> >  CONFIG_DRM_PANEL_LVDS=m
> >  CONFIG_DRM_PANEL_SIMPLE=m
> > -CONFIG_DRM_SIMPLE_BRIDGE=m
> > +CONFIG_DRM_PANEL_SITRONIX_ST7703=m
> >  CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
> >  CONFIG_DRM_DISPLAY_CONNECTOR=m
> > +CONFIG_DRM_NWL_MIPI_DSI=m
> >  CONFIG_DRM_SII902X=m
> > +CONFIG_DRM_SIMPLE_BRIDGE=m
> 
> One nit: I suppose the CONFIG_DRM_SIMPLE_BRIDGE=m move comes from a
> defconfig re-sync.
> 
> Maybe this re-sync could be part of a separate patch?

I've moved re-sync of the drm related bits to a separate patch in v2. I
didn't do a full resync since this varies between kernel version but i
can do that too - maybe against 5.9-rc1 if that helps.

> Thanks for adding these options to the defconfig so that we could have
> MIPI DSI working by default on i.MX8M:
> 
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> 

Thanks!
 -- Guido

Patch
diff mbox series

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e0f33826819f..608019f6408d 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -640,10 +640,12 @@  CONFIG_DRM_MSM=m
 CONFIG_DRM_TEGRA=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
-CONFIG_DRM_SIMPLE_BRIDGE=m
+CONFIG_DRM_PANEL_SITRONIX_ST7703=m
 CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
 CONFIG_DRM_DISPLAY_CONNECTOR=m
+CONFIG_DRM_NWL_MIPI_DSI=m
 CONFIG_DRM_SII902X=m
+CONFIG_DRM_SIMPLE_BRIDGE=m
 CONFIG_DRM_THINE_THC63LVD1024=m
 CONFIG_DRM_TI_SN65DSI86=m
 CONFIG_DRM_I2C_ADV7511=m
@@ -937,11 +939,13 @@  CONFIG_PWM_SAMSUNG=y
 CONFIG_PWM_SUN4I=m
 CONFIG_PWM_TEGRA=m
 CONFIG_QCOM_PDC=y
+CONFIG_RESET_IMX7=y
 CONFIG_RESET_QCOM_AOSS=y
 CONFIG_RESET_QCOM_PDC=m
 CONFIG_RESET_TI_SCI=y
 CONFIG_PHY_XGENE=y
 CONFIG_PHY_SUN4I_USB=y
+CONFIG_PHY_MIXEL_MIPI_DPHY=m
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_HISTB_COMBPHY=y
 CONFIG_PHY_HISI_INNO_USB2=y