| Message ID | 20200731041018.1381642-1-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | MIPS: Provide Kconfig option for default IEEE754 conformance mode | expand |
On Fri, Jul 31, 2020 at 12:10:16PM +0800, Jiaxun Yang wrote: > Requested by downstream distros, a Kconfig option for default > IEEE754 conformance mode allows them to set their mode to > relaxed by default. That's what should have been here in the first place. Thanks! Reviewed-by: Serge Semin <fancer.lancer@gmail.com> > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > arch/mips/Kconfig | 21 +++++++++++++++++++++ > arch/mips/kernel/cpu-probe.c | 12 +++++++++++- > 2 files changed, 32 insertions(+), 1 deletion(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index f6bb446d30f0..ef5b2a177b1b 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -2877,6 +2877,27 @@ config MIPS_NR_CPU_NR_MAP > default 1024 if MIPS_NR_CPU_NR_MAP_1024 > default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 > > +choice > + prompt "Default IEEE Std 754 conformance mode" > + default IEEE754_DEFAULT_STRICT > + help > + Default IEEE Std 754 conformance mode, see ieee754= kernel parameter > + for detail. > + > + config IEEE754_DEFAULT_STRICT > + bool "Strict" > + > + config IEEE754_DEFAULT_LEGACY > + bool "Legacy" > + > + config IEEE754_DEFAULT_STD2008 > + bool "2008" > + > + config IEEE754_DEFAULT_RELAXED > + bool "Relaxed" > + > +endchoice > + > # > # Timer Interrupt Frequency Configuration > # > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > index d9e8d39a7289..03adeed58efb 100644 > --- a/arch/mips/kernel/cpu-probe.c > +++ b/arch/mips/kernel/cpu-probe.c > @@ -157,7 +157,17 @@ static void cpu_set_fpu_2008(struct cpuinfo_mips *c) > * IEEE 754 conformance mode to use. Affects the NaN encoding and the > * ABS.fmt/NEG.fmt execution mode. > */ > -static enum { STRICT, LEGACY, STD2008, RELAXED } ieee754 = STRICT; > +enum ieee754_mode { STRICT, LEGACY, STD2008, RELAXED }; > + > +#if defined(CONFIG_IEEE754_DEFAULT_STRICT) > +static enum ieee754_mode ieee754 = STRICT; > +#elif defined(CONFIG_IEEE754_DEFAULT_LEGACY) > +static enum ieee754_mode ieee754 = LEGACY; > +#elif defined(CONFIG_IEEE754_DEFAULT_STD2008) > +static enum ieee754_mode ieee754 = STD2008; > +#elif defined(CONFIG_IEEE754_DEFAULT_RELAXED) > +static enum ieee754_mode ieee754 = RELAXED; > +#endif > > /* > * Set the IEEE 754 NaN encodings and the ABS.fmt/NEG.fmt execution modes > -- > 2.28.0 >
Reviewed-by: Huacai Chen <chenhc@lemote.com> On Fri, Jul 31, 2020 at 2:18 PM Serge Semin <Sergey.Semin@baikalelectronics.ru> wrote: > > On Fri, Jul 31, 2020 at 12:10:16PM +0800, Jiaxun Yang wrote: > > Requested by downstream distros, a Kconfig option for default > > IEEE754 conformance mode allows them to set their mode to > > relaxed by default. > > That's what should have been here in the first place. Thanks! > Reviewed-by: Serge Semin <fancer.lancer@gmail.com> > > > > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > > --- > > arch/mips/Kconfig | 21 +++++++++++++++++++++ > > arch/mips/kernel/cpu-probe.c | 12 +++++++++++- > > 2 files changed, 32 insertions(+), 1 deletion(-) > > > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > > index f6bb446d30f0..ef5b2a177b1b 100644 > > --- a/arch/mips/Kconfig > > +++ b/arch/mips/Kconfig > > @@ -2877,6 +2877,27 @@ config MIPS_NR_CPU_NR_MAP > > default 1024 if MIPS_NR_CPU_NR_MAP_1024 > > default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 > > > > +choice > > + prompt "Default IEEE Std 754 conformance mode" > > + default IEEE754_DEFAULT_STRICT > > + help > > + Default IEEE Std 754 conformance mode, see ieee754= kernel parameter > > + for detail. > > + > > + config IEEE754_DEFAULT_STRICT > > + bool "Strict" > > + > > + config IEEE754_DEFAULT_LEGACY > > + bool "Legacy" > > + > > + config IEEE754_DEFAULT_STD2008 > > + bool "2008" > > + > > + config IEEE754_DEFAULT_RELAXED > > + bool "Relaxed" > > + > > +endchoice > > + > > # > > # Timer Interrupt Frequency Configuration > > # > > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > > index d9e8d39a7289..03adeed58efb 100644 > > --- a/arch/mips/kernel/cpu-probe.c > > +++ b/arch/mips/kernel/cpu-probe.c > > @@ -157,7 +157,17 @@ static void cpu_set_fpu_2008(struct cpuinfo_mips *c) > > * IEEE 754 conformance mode to use. Affects the NaN encoding and the > > * ABS.fmt/NEG.fmt execution mode. > > */ > > -static enum { STRICT, LEGACY, STD2008, RELAXED } ieee754 = STRICT; > > +enum ieee754_mode { STRICT, LEGACY, STD2008, RELAXED }; > > + > > +#if defined(CONFIG_IEEE754_DEFAULT_STRICT) > > +static enum ieee754_mode ieee754 = STRICT; > > +#elif defined(CONFIG_IEEE754_DEFAULT_LEGACY) > > +static enum ieee754_mode ieee754 = LEGACY; > > +#elif defined(CONFIG_IEEE754_DEFAULT_STD2008) > > +static enum ieee754_mode ieee754 = STD2008; > > +#elif defined(CONFIG_IEEE754_DEFAULT_RELAXED) > > +static enum ieee754_mode ieee754 = RELAXED; > > +#endif > > > > /* > > * Set the IEEE 754 NaN encodings and the ABS.fmt/NEG.fmt execution modes > > -- > > 2.28.0 > >
Hi Jiaxun, Nice catch! Only one minor nit. Otherwise: Reviewed-by: WANG Xuerui <git@xen0n.name> On 2020/7/31 12:10, Jiaxun Yang wrote: > Requested by downstream distros, a Kconfig option for default > IEEE754 conformance mode allows them to set their mode to > relaxed by default. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > arch/mips/Kconfig | 21 +++++++++++++++++++++ > arch/mips/kernel/cpu-probe.c | 12 +++++++++++- > 2 files changed, 32 insertions(+), 1 deletion(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index f6bb446d30f0..ef5b2a177b1b 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -2877,6 +2877,27 @@ config MIPS_NR_CPU_NR_MAP > default 1024 if MIPS_NR_CPU_NR_MAP_1024 > default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 > > +choice > + prompt "Default IEEE Std 754 conformance mode" > + default IEEE754_DEFAULT_STRICT > + help > + Default IEEE Std 754 conformance mode, see ieee754= kernel parameter > + for detail. Here and the title, "IEEE Std 754" can be just "IEEE 754". I don't remember seeing the "IEEE Std 754" phrase anywhere. I suggest the following help message: "Sets the default IEEE 754 conformance mode, same as overriding the default value for the ieee754= kernel parameter. See the kernel parameter for details." > + > + config IEEE754_DEFAULT_STRICT > + bool "Strict" > + > + config IEEE754_DEFAULT_LEGACY > + bool "Legacy" > + > + config IEEE754_DEFAULT_STD2008 > + bool "2008" > + > + config IEEE754_DEFAULT_RELAXED > + bool "Relaxed" > + > +endchoice > + > # > # Timer Interrupt Frequency Configuration > # > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > index d9e8d39a7289..03adeed58efb 100644 > --- a/arch/mips/kernel/cpu-probe.c > +++ b/arch/mips/kernel/cpu-probe.c > @@ -157,7 +157,17 @@ static void cpu_set_fpu_2008(struct cpuinfo_mips *c) > * IEEE 754 conformance mode to use. Affects the NaN encoding and the > * ABS.fmt/NEG.fmt execution mode. > */ > -static enum { STRICT, LEGACY, STD2008, RELAXED } ieee754 = STRICT; > +enum ieee754_mode { STRICT, LEGACY, STD2008, RELAXED }; > + > +#if defined(CONFIG_IEEE754_DEFAULT_STRICT) > +static enum ieee754_mode ieee754 = STRICT; > +#elif defined(CONFIG_IEEE754_DEFAULT_LEGACY) > +static enum ieee754_mode ieee754 = LEGACY; > +#elif defined(CONFIG_IEEE754_DEFAULT_STD2008) > +static enum ieee754_mode ieee754 = STD2008; > +#elif defined(CONFIG_IEEE754_DEFAULT_RELAXED) > +static enum ieee754_mode ieee754 = RELAXED; > +#endif > > /* > * Set the IEEE 754 NaN encodings and the ABS.fmt/NEG.fmt execution modes
On Fri, 31 Jul 2020, Serge Semin wrote: > > Requested by downstream distros, a Kconfig option for default > > IEEE754 conformance mode allows them to set their mode to > > relaxed by default. > > That's what should have been here in the first place. Thanks! Well, originally plans were there to have NaN interlinking implemented and no such mess or desire for hacks like one here would result. Cf.: <https://gcc.gnu.org/ml/gcc/2015-11/msg00068.html>, <https://gcc.gnu.org/ml/gcc/2016-05/msg00137.html>, and then: <https://lkml.org/lkml/2015/11/16/386>, <https://sourceware.org/ml/libc-alpha/2015-11/msg00485.html>, <https://sourceware.org/ml/binutils/2015-11/msg00170.html>, <https://gcc.gnu.org/ml/gcc-patches/2015-11/msg03241.html>. You could well pick this work up and complete it if you like. Final conclusions for further work were made here: <https://gcc.gnu.org/ml/gcc/2016-11/msg00027.html>, <https://gcc.gnu.org/ml/gcc/2017-08/msg00260.html>, <https://gcc.gnu.org/ml/gcc/2017-10/msg00142.html>. In the relaxed mode math programs may produce wrong results unless you rebuild all your software for the correct NaN mode for the hardware used (in which case you don't need the relaxed setting in the first place). Maciej
在 2020/8/3 上午5:46, Maciej W. Rozycki 写道: > On Fri, 31 Jul 2020, Serge Semin wrote: > >>> Requested by downstream distros, a Kconfig option for default >>> IEEE754 conformance mode allows them to set their mode to >>> relaxed by default. >> That's what should have been here in the first place. Thanks! > Well, originally plans were there to have NaN interlinking implemented > and no such mess or desire for hacks like one here would result. Cf.: > > <https://gcc.gnu.org/ml/gcc/2015-11/msg00068.html>, > <https://gcc.gnu.org/ml/gcc/2016-05/msg00137.html>, > > and then: > > <https://lkml.org/lkml/2015/11/16/386>, > <https://sourceware.org/ml/libc-alpha/2015-11/msg00485.html>, > <https://sourceware.org/ml/binutils/2015-11/msg00170.html>, > <https://gcc.gnu.org/ml/gcc-patches/2015-11/msg03241.html>. > > You could well pick this work up and complete it if you like. Final > conclusions for further work were made here: > > <https://gcc.gnu.org/ml/gcc/2016-11/msg00027.html>, > <https://gcc.gnu.org/ml/gcc/2017-08/msg00260.html>, > <https://gcc.gnu.org/ml/gcc/2017-10/msg00142.html>. > > In the relaxed mode math programs may produce wrong results unless you > rebuild all your software for the correct NaN mode for the hardware used Unfortunately most of the hardware guys didn't understood the difficulty here. They decided to implement their hardware (P5600 & LS3A4000) as NaN2008 only. I was thinking about let Kernel drop SIGFPE exception was caused by mismatched NaN, as most applications don't rely on signaling NaN, but it is still a dirty hack. Not a good idea in general. Thanks. - Jiaxun > (in which case you don't need the relaxed setting in the first place). > > Maciej
On Mon, 3 Aug 2020, Jiaxun Yang wrote: > > Well, originally plans were there to have NaN interlinking implemented > > and no such mess or desire for hacks like one here would result. Cf.: > > > > <https://gcc.gnu.org/ml/gcc/2015-11/msg00068.html>, > > <https://gcc.gnu.org/ml/gcc/2016-05/msg00137.html>, > > > > and then: > > > > <https://lkml.org/lkml/2015/11/16/386>, > > <https://sourceware.org/ml/libc-alpha/2015-11/msg00485.html>, > > <https://sourceware.org/ml/binutils/2015-11/msg00170.html>, > > <https://gcc.gnu.org/ml/gcc-patches/2015-11/msg03241.html>. > > > > You could well pick this work up and complete it if you like. Final > > conclusions for further work were made here: > > > > <https://gcc.gnu.org/ml/gcc/2016-11/msg00027.html>, > > <https://gcc.gnu.org/ml/gcc/2017-08/msg00260.html>, > > <https://gcc.gnu.org/ml/gcc/2017-10/msg00142.html>. > > > > In the relaxed mode math programs may produce wrong results unless you > > rebuild all your software for the correct NaN mode for the hardware used > > Unfortunately most of the hardware guys didn't understood the difficulty > here. > They decided to implement their hardware (P5600 & LS3A4000) as NaN2008 only. Sadly we (the software group) have lost the battle with the hardware group for the architecture to have FCSR.NAN2008 at least optionally writable, and the feature was subsequently removed from R5 on, along with the writability of FCSR.ABS2008 and the FCSR.MAC2008 bit altogether. Still R3 did permit those bits to be r/w (check rev. 3.50 of the architecture spec), which is why I implemented them as such in our FP emulation and also QEMU (although I need to note that a competing QEMU implementation was pushed upstream behind my back, which I believe wasn't as complete as mine, so this part may or may not have been implemented). > I was thinking about let Kernel drop SIGFPE exception was caused by > mismatched NaN, > as most applications don't rely on signaling NaN, but it is still a > dirty hack. Not a good > idea in general. I think you cannot reliably send SIGFPE, because hardware does not trap on what it considers a qNaN. The interlinking effort was there to let individual pieces of software that have various requirements for NaNs, or do not use FP at all, to use a set of rules for possibly being allowed to run on incompatible hardware or loaded together by the dynamic loader. For example there was a mode specified where all NaNs were silently treated as qNaNs regardless of the hardware interpretation of a specific encoding. I maintain this is the way to move forward, and if you are serious about keeping the architecture alive, then I strongly recommend to upstream the implementation, possibly based on my patches previously published, although as indicated in the discussion referred there have been design issues observed, which mean a certain amount of rework will be required, first on the spec, and then the implementation. FWIW, Maciej
在 2020/8/3 下午5:01, Jiaxun Yang 写道: > > > 在 2020/8/3 上午5:46, Maciej W. Rozycki 写道: >> On Fri, 31 Jul 2020, Serge Semin wrote: >> >>>> Requested by downstream distros, a Kconfig option for default >>>> IEEE754 conformance mode allows them to set their mode to >>>> relaxed by default. >>> That's what should have been here in the first place. Thanks! >> Well, originally plans were there to have NaN interlinking implemented >> and no such mess or desire for hacks like one here would result. Cf.: >> >> <https://gcc.gnu.org/ml/gcc/2015-11/msg00068.html>, >> <https://gcc.gnu.org/ml/gcc/2016-05/msg00137.html>, >> >> and then: >> >> <https://lkml.org/lkml/2015/11/16/386>, >> <https://sourceware.org/ml/libc-alpha/2015-11/msg00485.html>, >> <https://sourceware.org/ml/binutils/2015-11/msg00170.html>, >> <https://gcc.gnu.org/ml/gcc-patches/2015-11/msg03241.html>. >> >> You could well pick this work up and complete it if you like. Final >> conclusions for further work were made here: >> >> <https://gcc.gnu.org/ml/gcc/2016-11/msg00027.html>, >> <https://gcc.gnu.org/ml/gcc/2017-08/msg00260.html>, >> <https://gcc.gnu.org/ml/gcc/2017-10/msg00142.html>. >> >> In the relaxed mode math programs may produce wrong results unless you >> rebuild all your software for the correct NaN mode for the hardware used > > Unfortunately most of the hardware guys didn't understood the > difficulty here. > They decided to implement their hardware (P5600 & LS3A4000) as NaN2008 > only. > All SoCs based on Ingenic XBurst2 CPU core are also NaN2008 only. > I was thinking about let Kernel drop SIGFPE exception was caused by > mismatched NaN, > as most applications don't rely on signaling NaN, but it is still a > dirty hack. Not a good > idea in general. > > Thanks. > > - Jiaxun > >> (in which case you don't need the relaxed setting in the first place). > >> >> Maciej
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f6bb446d30f0..ef5b2a177b1b 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2877,6 +2877,27 @@ config MIPS_NR_CPU_NR_MAP default 1024 if MIPS_NR_CPU_NR_MAP_1024 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 +choice + prompt "Default IEEE Std 754 conformance mode" + default IEEE754_DEFAULT_STRICT + help + Default IEEE Std 754 conformance mode, see ieee754= kernel parameter + for detail. + + config IEEE754_DEFAULT_STRICT + bool "Strict" + + config IEEE754_DEFAULT_LEGACY + bool "Legacy" + + config IEEE754_DEFAULT_STD2008 + bool "2008" + + config IEEE754_DEFAULT_RELAXED + bool "Relaxed" + +endchoice + # # Timer Interrupt Frequency Configuration # diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index d9e8d39a7289..03adeed58efb 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -157,7 +157,17 @@ static void cpu_set_fpu_2008(struct cpuinfo_mips *c) * IEEE 754 conformance mode to use. Affects the NaN encoding and the * ABS.fmt/NEG.fmt execution mode. */ -static enum { STRICT, LEGACY, STD2008, RELAXED } ieee754 = STRICT; +enum ieee754_mode { STRICT, LEGACY, STD2008, RELAXED }; + +#if defined(CONFIG_IEEE754_DEFAULT_STRICT) +static enum ieee754_mode ieee754 = STRICT; +#elif defined(CONFIG_IEEE754_DEFAULT_LEGACY) +static enum ieee754_mode ieee754 = LEGACY; +#elif defined(CONFIG_IEEE754_DEFAULT_STD2008) +static enum ieee754_mode ieee754 = STD2008; +#elif defined(CONFIG_IEEE754_DEFAULT_RELAXED) +static enum ieee754_mode ieee754 = RELAXED; +#endif /* * Set the IEEE 754 NaN encodings and the ABS.fmt/NEG.fmt execution modes
Requested by downstream distros, a Kconfig option for default IEEE754 conformance mode allows them to set their mode to relaxed by default. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/Kconfig | 21 +++++++++++++++++++++ arch/mips/kernel/cpu-probe.c | 12 +++++++++++- 2 files changed, 32 insertions(+), 1 deletion(-)