diff mbox series

[52/56] KVM: arm: Add trace name for ARM_NISV

Message ID	20200805175700.62775-53-maz@kernel.org (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=UpKl=BP=vger.kernel.org=kvm-owner@kernel.org> From: Marc Zyngier <maz@kernel.org> To: Paolo Bonzini <pbonzini@redhat.com> Cc: Alexander Graf <graf@amazon.com>, Alexandru Elisei <alexandru.elisei@arm.com>, Andrew Scull <ascull@google.com>, Catalin Marinas <catalin.marinas@arm.com>, Christoffer Dall <christoffer.dall@arm.com>, David Brazdil <dbrazdil@google.com>, Eric Auger <eric.auger@redhat.com>, Gavin Shan <gshan@redhat.com>, James Morse <james.morse@arm.com>, Mark Rutland <mark.rutland@arm.com>, Peng Hao <richard.peng@oppo.com>, Quentin Perret <qperret@google.com>, Will Deacon <will@kernel.org>, Julien Thierry <julien.thierry.kdev@gmail.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kernel-team@android.com Subject: [PATCH 52/56] KVM: arm: Add trace name for ARM_NISV Date: Wed, 5 Aug 2020 18:56:56 +0100 Message-Id: <20200805175700.62775-53-maz@kernel.org> In-Reply-To: <20200805175700.62775-1-maz@kernel.org> References: <20200805175700.62775-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk
Series	[01/56] KVM: arm64: Enable Address Authentication at EL2 if available \| expand [01/56] KVM: arm64: Enable Address Authentication at EL2 if available [02/56] KVM: arm64: Allow ARM64_PTR_AUTH when ARM64_VHE=n [03/56] KVM: arm64: Allow PtrAuth to be enabled from userspace on non-VHE systems [04/56] KVM: arm64: Check HCR_EL2 instead of shadow copy to swap PtrAuth registers [05/56] KVM: arm64: Simplify PtrAuth alternative patching [06/56] KVM: arm64: Allow in-atomic injection of SPIs [07/56] arm64: kvm: Remove kern_hyp_va from get_vcpu_ptr [08/56] KVM: arm64: Drop the target_table[] indirection [09/56] KVM: arm64: Tolerate an empty target_table list [10/56] KVM: arm64: Move ACTLR_EL1 emulation to the sys_reg_descs array [11/56] KVM: arm64: Remove target_table from exit handlers [12/56] KVM: arm64: Remove the target table [13/56] KVM: arm64: Fix symbol dependency in __hyp_call_panic_nvhe [14/56] KVM: arm64: Move __smccc_workaround_1_smc to .rodata [15/56] KVM: arm64: Add build rules for separate VHE/nVHE object files [16/56] KVM: arm64: Use build-time defines in has_vhe() [17/56] KVM: arm64: Handle calls to prefixed hyp functions [18/56] KVM: arm64: Build hyp-entry.S separately for VHE/nVHE [19/56] KVM: arm64: Move hyp-init.S to nVHE [20/56] KVM: arm64: Duplicate hyp/tlb.c for VHE/nVHE [21/56] KVM: arm64: Split hyp/switch.c to VHE/nVHE [22/56] KVM: arm64: Split hyp/debug-sr.c to VHE/nVHE [23/56] KVM: arm64: Split hyp/sysreg-sr.c to VHE/nVHE [24/56] KVM: arm64: Duplicate hyp/timer-sr.c for VHE/nVHE [25/56] KVM: arm64: Compile remaining hyp/ files for both VHE/nVHE [26/56] KVM: arm64: Remove __hyp_text macro, use build rules instead [27/56] KVM: arm64: Lift instrumentation restrictions on VHE [28/56] KVM: arm64: vgic-its: Change default outer cacheability for {PEND, PROP}BASER [29/56] KVM: arm64: Drop long gone function parameter documentation [30/56] KVM: arm64: Rename HSR to ESR [31/56] arm64: Detect the ARMv8.4 TTL feature [32/56] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors [33/56] arm64: Add level-hinted TLB invalidation helper [34/56] KVM: arm64: Factor out stage 2 page table data from struct kvm [35/56] KVM: arm64: Use TTL hint in when invalidating stage-2 translations [36/56] KVM: arm64: Introduce accessor for ctxt->sys_reg [37/56] KVM: arm64: hyp: Use ctxt_sys_reg/__vcpu_sys_reg instead of raw sys_regs access [38/56] KVM: arm64: sve: Use __vcpu_sys_reg() instead of raw sys_regs access [39/56] KVM: arm64: pauth: Use ctxt_sys_reg() instead of raw sys_regs access [40/56] KVM: arm64: debug: Drop useless vpcu parameter [41/56] KVM: arm64: Make struct kvm_regs userspace-only [42/56] KVM: arm64: Move ELR_EL1 to the system register array [43/56] KVM: arm64: Move SP_EL1 to the system register array [44/56] KVM: arm64: Disintegrate SPSR array [45/56] KVM: arm64: Move SPSR_EL1 to the system register array [46/56] KVM: arm64: timers: Rename kvm_timer_sync_hwstate to kvm_timer_sync_user [47/56] KVM: arm64: timers: Move timer registers to the sys_regs file [48/56] KVM: arm64: Don't use has_vhe() for CHOOSE_HYP_SYM() [49/56] KVM: arm64: Make nVHE ASLR conditional on RANDOMIZE_BASE [50/56] KVM: arm64: Substitute RANDOMIZE_BASE for HARDEN_EL2_VECTORS [51/56] KVM: arm64: Ensure that all nVHE hyp code is in .hyp.text [52/56] KVM: arm: Add trace name for ARM_NISV [53/56] KVM: arm64: Rename kvm_vcpu_dabt_isextabt() [54/56] KVM: arm64: Handle data and instruction external aborts the same way [55/56] KVM: arm64: Don't skip cache maintenance for read-only memslots [56/56] KVM: arm64: Move S1PTW S2 fault logic out of io_mem_abort()

Commit Message

Marc Zyngier Aug. 5, 2020, 5:56 p.m. UTC

From: Alexander Graf <graf@amazon.com>

Commit c726200dd106d ("KVM: arm/arm64: Allow reporting non-ISV data aborts
to userspace") introduced a mechanism to deflect MMIO traffic the kernel
can not handle to user space. For that, it introduced a new exit reason.

However, it did not update the trace point array that gives human readable
names to these exit reasons inside the trace log.

Let's fix that up after the fact, so that trace logs are pretty even when
we get user space MMIO traps on ARM.

Fixes: c726200dd106d ("KVM: arm/arm64: Allow reporting non-ISV data aborts to userspace")
Signed-off-by: Alexander Graf <graf@amazon.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200730094441.18231-1-graf@amazon.com
---
 include/trace/events/kvm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/include/trace/events/kvm.h b/include/trace/events/kvm.h
index 2c735a3e6613..9417a34aad08 100644
--- a/include/trace/events/kvm.h
+++ b/include/trace/events/kvm.h
@@ -17,7 +17,7 @@ 
 	ERSN(NMI), ERSN(INTERNAL_ERROR), ERSN(OSI), ERSN(PAPR_HCALL),	\
 	ERSN(S390_UCONTROL), ERSN(WATCHDOG), ERSN(S390_TSCH), ERSN(EPR),\
 	ERSN(SYSTEM_EVENT), ERSN(S390_STSI), ERSN(IOAPIC_EOI),          \
-	ERSN(HYPERV)
+	ERSN(HYPERV), ERSN(ARM_NISV)
 
 TRACE_EVENT(kvm_userspace_exit,
 	    TP_PROTO(__u32 reason, int errno),