| Message ID | 1596959242-2372-3-git-send-email-cathy.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Expose new features for Intel processor | expand |
On 09/08/20 09:47, Cathy Zhang wrote: > Expose the SERIALIZE and TSX Suspend Load Address Tracking > features in KVM CPUID, so when running on processors which > support them, KVM could pass this information to guests and > they can make use of these features accordingly. > > SERIALIZE is a faster serializing instruction which does not modify > registers, arithmetic flags or memory, will not cause VM exit. It's > availability is indicated by CPUID.(EAX=7,ECX=0):ECX[bit 14]. > > TSX suspend load tracking instruction aims to give a way to choose > which memory accesses do not need to be tracked in the TSX read set. > It's availability is indicated as CPUID.(EAX=7,ECX=0):EDX[bit 16]. > > Those instructions are currently documented in the the latest "extensions" > manual (ISE). It will appear in the "main" manual (SDM) in the future. > > Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> > Reviewed-by: Tony Luck <tony.luck@intel.com> > --- > Changes since v2: > * Merge two patches into a single one. (Luck, Tony) > * Add overview introduction for features. (Sean Christopherson) > * Refactor commit message to explain why expose feature bits. (Luck, Tony) > --- > arch/x86/kvm/cpuid.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 8a294f9..dcf48cc 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void) > kvm_cpu_cap_mask(CPUID_7_EDX, > F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | > F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | > - F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) > + F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | > + F(SERIALIZE) | F(TSXLDTRK) > ); > > /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ > TSXLDTRK is not going to be in 5.9 as far as I can see, so I split back again the patches (this is why I prefer them to be split, sorry Tony :)) and committed the SERIALIZE part. Paolo
On 8/10/2020 1:14 AM, Paolo Bonzini wrote: > On 09/08/20 09:47, Cathy Zhang wrote: >> Expose the SERIALIZE and TSX Suspend Load Address Tracking >> features in KVM CPUID, so when running on processors which >> support them, KVM could pass this information to guests and >> they can make use of these features accordingly. >> >> SERIALIZE is a faster serializing instruction which does not modify >> registers, arithmetic flags or memory, will not cause VM exit. It's >> availability is indicated by CPUID.(EAX=7,ECX=0):ECX[bit 14]. >> >> TSX suspend load tracking instruction aims to give a way to choose >> which memory accesses do not need to be tracked in the TSX read set. >> It's availability is indicated as CPUID.(EAX=7,ECX=0):EDX[bit 16]. >> >> Those instructions are currently documented in the the latest "extensions" >> manual (ISE). It will appear in the "main" manual (SDM) in the future. >> >> Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> >> Reviewed-by: Tony Luck <tony.luck@intel.com> >> --- >> Changes since v2: >> * Merge two patches into a single one. (Luck, Tony) >> * Add overview introduction for features. (Sean Christopherson) >> * Refactor commit message to explain why expose feature bits. (Luck, Tony) >> --- >> arch/x86/kvm/cpuid.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >> index 8a294f9..dcf48cc 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void) >> kvm_cpu_cap_mask(CPUID_7_EDX, >> F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | >> F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | >> - F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) >> + F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | >> + F(SERIALIZE) | F(TSXLDTRK) >> ); >> >> /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ >> > TSXLDTRK is not going to be in 5.9 as far as I can see, so I split back > again the patches (this is why I prefer them to be split, sorry Tony :)) > and committed the SERIALIZE part. > > Paolo Hello Paolo, As you suggest, I will split the kvm patch into two parts, SERIALIZE and TSXLDTRK, and this series will include three patches then, 2 kvm patches and 1 kernel patch. SERIALIZE could get merged into 5.9, but TSXLDTRK should wait for the next release. I just want to double confirm with you, please help correct me if I'm wrong.
> As you suggest, I will split the kvm patch into two parts, SERIALIZE and > TSXLDTRK, and this series will include three patches then, 2 kvm patches > and 1 kernel patch. SERIALIZE could get merged into 5.9, but TSXLDTRK > should wait for the next release. I just want to double confirm with > you, please help correct me if I'm wrong. Paolo is saying that he has applied the SERIALIZE part to his KVM tree. https://git.kernel.org/pub/scm/virt/kvm/kvm.git/commit/?h=queue&id=43bd9ef42b3b862c97f1f4e86bf3ace890bef924 Next step for you is a two part series. Part 1: Add TSXLDTRK to cpufeatures.h Part 2: Add TSXLDTRK to arch/x86/kvm/cpuid.c (on top of the version that Paolo committed with SERIALIZE) Paolo: The 5.9 merge window is still open this week. Will you send the KVM serialize patch to Linus before this merge window closes? Or do you have it queued for v5.10? -Tony
On 8/11/2020 7:59 AM, Luck, Tony wrote: >> As you suggest, I will split the kvm patch into two parts, SERIALIZE and >> TSXLDTRK, and this series will include three patches then, 2 kvm patches >> and 1 kernel patch. SERIALIZE could get merged into 5.9, but TSXLDTRK >> should wait for the next release. I just want to double confirm with >> you, please help correct me if I'm wrong. > Paolo is saying that he has applied the SERIALIZE part to his KVM tree. > > https://git.kernel.org/pub/scm/virt/kvm/kvm.git/commit/?h=queue&id=43bd9ef42b3b862c97f1f4e86bf3ace890bef924 > > Next step for you is a two part series. > > Part 1: Add TSXLDTRK to cpufeatures.h > Part 2: Add TSXLDTRK to arch/x86/kvm/cpuid.c (on top of the version that Paolo committed with SERIALIZE) > > Paolo: The 5.9 merge window is still open this week. Will you send the KVM serialize patch to Linus > before this merge window closes? Or do you have it queued for v5.10? > > -Tony Got it! Thanks for the explanation, Tony!
On 11/08/20 01:59, Luck, Tony wrote: > > Part 1: Add TSXLDTRK to cpufeatures.h Part 2: Add TSXLDTRK to > arch/x86/kvm/cpuid.c (on top of the version that Paolo committed with > SERIALIZE) > > Paolo: The 5.9 merge window is still open this week. Will you send > the KVM serialize patch to Linus before this merge window closes? Or > do you have it queued for v5.10? Yes, I am sending it today together with the bulk of ARM and PPC changes. I just wanted to soak the branch in linux-next for a day or two, just in case I screwed up the ARM and PPC pull requests. Paolo
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 8a294f9..dcf48cc 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_mask(CPUID_7_EDX, F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | - F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) + F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | + F(SERIALIZE) | F(TSXLDTRK) ); /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */