| Message ID | 20200812083459.989-1-algea.cao@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support change dw-hdmi output color | expand |
On 12/08/2020 10:34, Algea Cao wrote: > Introduce previous_pixelclock/previous_tmdsclock to > determine whether PHY needs initialization. If phy is power off, > or mpixelclock/mtmdsclock is different to previous value, phy is > neet to be reinitialized. > > Signed-off-by: Algea Cao <algea.cao@rock-chips.com> > --- > > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 50 +++++++++++++++++++---- > 1 file changed, 43 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > index a1a81fc768c2..1eb4736b9b59 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > @@ -101,6 +101,8 @@ static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { > struct hdmi_vmode { > bool mdataenablepolarity; > > + unsigned int previous_pixelclock; > + unsigned int previous_tmdsclock; > unsigned int mpixelclock; > unsigned int mpixelrepetitioninput; > unsigned int mpixelrepetitionoutput; > @@ -890,6 +892,32 @@ static int hdmi_bus_fmt_color_depth(unsigned int bus_format) > } > } > > +static unsigned int > +hdmi_get_tmdsclock(struct dw_hdmi *hdmi, unsigned long mpixelclock) > +{ > + unsigned int tmdsclock = mpixelclock; > + unsigned int depth = > + hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); > + > + if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { > + switch (depth) { > + case 16: > + tmdsclock = mpixelclock * 2; > + break; > + case 12: > + tmdsclock = mpixelclock * 3 / 2; > + break; > + case 10: > + tmdsclock = mpixelclock * 5 / 4; > + break; > + default: > + break; > + } > + } Where does this come from ? Please introduce this on another patch. Neil > + > + return tmdsclock; > +} > + > /* > * this submodule is responsible for the video data synchronization. > * for example, for RGB 4:4:4 input, the data map is defined as > @@ -1861,11 +1889,13 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, > int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; > unsigned int vdisplay, hdisplay; > > + vmode->previous_pixelclock = vmode->mpixelclock; > vmode->mpixelclock = mode->clock * 1000; > > dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); > > - vmode->mtmdsclock = vmode->mpixelclock; > + vmode->previous_tmdsclock = vmode->mtmdsclock; > + vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock); > > if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { > switch (hdmi_bus_fmt_color_depth( > @@ -2172,12 +2202,18 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, > hdmi_av_composer(hdmi, &connector->display_info, mode); > > /* HDMI Initializateion Step B.2 */ > - ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, > - &connector->display_info, > - &hdmi->previous_mode); > - if (ret) > - return ret; > - hdmi->phy.enabled = true; > + if (!hdmi->phy.enabled || > + hdmi->hdmi_data.video_mode.previous_pixelclock != > + hdmi->hdmi_data.video_mode.mpixelclock || > + hdmi->hdmi_data.video_mode.previous_tmdsclock != > + hdmi->hdmi_data.video_mode.mtmdsclock) { > + ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, > + &connector->display_info, > + &hdmi->previous_mode); > + if (ret) > + return ret; > + hdmi->phy.enabled = true; > + } > > /* HDMI Initialization Step B.3 */ > dw_hdmi_enable_video_path(hdmi); >
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index a1a81fc768c2..1eb4736b9b59 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -101,6 +101,8 @@ static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { struct hdmi_vmode { bool mdataenablepolarity; + unsigned int previous_pixelclock; + unsigned int previous_tmdsclock; unsigned int mpixelclock; unsigned int mpixelrepetitioninput; unsigned int mpixelrepetitionoutput; @@ -890,6 +892,32 @@ static int hdmi_bus_fmt_color_depth(unsigned int bus_format) } } +static unsigned int +hdmi_get_tmdsclock(struct dw_hdmi *hdmi, unsigned long mpixelclock) +{ + unsigned int tmdsclock = mpixelclock; + unsigned int depth = + hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); + + if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { + switch (depth) { + case 16: + tmdsclock = mpixelclock * 2; + break; + case 12: + tmdsclock = mpixelclock * 3 / 2; + break; + case 10: + tmdsclock = mpixelclock * 5 / 4; + break; + default: + break; + } + } + + return tmdsclock; +} + /* * this submodule is responsible for the video data synchronization. * for example, for RGB 4:4:4 input, the data map is defined as @@ -1861,11 +1889,13 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; unsigned int vdisplay, hdisplay; + vmode->previous_pixelclock = vmode->mpixelclock; vmode->mpixelclock = mode->clock * 1000; dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); - vmode->mtmdsclock = vmode->mpixelclock; + vmode->previous_tmdsclock = vmode->mtmdsclock; + vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock); if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { switch (hdmi_bus_fmt_color_depth( @@ -2172,12 +2202,18 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, hdmi_av_composer(hdmi, &connector->display_info, mode); /* HDMI Initializateion Step B.2 */ - ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, - &connector->display_info, - &hdmi->previous_mode); - if (ret) - return ret; - hdmi->phy.enabled = true; + if (!hdmi->phy.enabled || + hdmi->hdmi_data.video_mode.previous_pixelclock != + hdmi->hdmi_data.video_mode.mpixelclock || + hdmi->hdmi_data.video_mode.previous_tmdsclock != + hdmi->hdmi_data.video_mode.mtmdsclock) { + ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, + &connector->display_info, + &hdmi->previous_mode); + if (ret) + return ret; + hdmi->phy.enabled = true; + } /* HDMI Initialization Step B.3 */ dw_hdmi_enable_video_path(hdmi);
Introduce previous_pixelclock/previous_tmdsclock to determine whether PHY needs initialization. If phy is power off, or mpixelclock/mtmdsclock is different to previous value, phy is neet to be reinitialized. Signed-off-by: Algea Cao <algea.cao@rock-chips.com> --- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 50 +++++++++++++++++++---- 1 file changed, 43 insertions(+), 7 deletions(-)