From patchwork Fri Aug 14 02:39:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gurchetan Singh X-Patchwork-Id: 11713325 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F742109B for ; Fri, 14 Aug 2020 02:40:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0CDE20656 for ; Fri, 14 Aug 2020 02:40:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="mir45HDC" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F0CDE20656 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F115F6E5A9; Fri, 14 Aug 2020 02:40:12 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) by gabe.freedesktop.org (Postfix) with ESMTPS id D1D1F6E5A5 for ; Fri, 14 Aug 2020 02:40:10 +0000 (UTC) Received: by mail-pj1-x1042.google.com with SMTP id e4so3727078pjd.0 for ; Thu, 13 Aug 2020 19:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oamhYrj5DuB4eZUEsM7h/O+LtziUvlw4w0mM3+Pas4Y=; b=mir45HDCYbR/sZyfOf/I1Tdt3LRefmrBYwUOmgckdWjNxyemcKdHYQaFETH1eJDWTA qhSR1YlgNVTi8bOaRHEY9YcrcwoCMvgkNOMEVOJegzfdxpfg/FIMxFZViLfEu5RjSvWE nWxRi2yunaVKa8uXfh61lq3FGM533M8wOgA9c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oamhYrj5DuB4eZUEsM7h/O+LtziUvlw4w0mM3+Pas4Y=; b=MeuxGgINnngU2EN/XTaZ24i1mNaYZkEiMCfl846tDLwhr9//E5Wp58EIVRsixKxHrR oIEW6fv1QVbPaKVsn2ThnM1M/WRdf0OQwMb2/E3bc2IbwoQ+pp2Cr28d7/YY24H2/d4T 8OPSe/CXNJt7i50VGwV8q57AZNkkIg+9D4xaJd22SS7zokatPHU4/329tKxLUFLv52l2 7RXYgUsakQR9gWkPgcH9GSqDzpeLrDWWHdVGacFiH1ZkOgcM1tRu+O4bJOsTYdi5ac62 WMVM15CkCUvNyb+RUJ9vuG9XkLz3DBaOXVO5IUkkiJzsuct+wmd++XAbLeeazhPqTLj0 49uw== X-Gm-Message-State: AOAM532UcWYAWxeUnWV/QYfB95MxPd2jEpwVu7Z8zJCHDZ/KLN6TDpJB mAFFPqdFRa0tQFD5oQ5b26iYti+5So9Taw== X-Google-Smtp-Source: ABdhPJwqw3NRFE8gjwbvL17MpbwwQ1ang2KF/TYlhxFcdncaALszTDpabQlyKcbvNhv3XK9MleZBLA== X-Received: by 2002:a17:90b:f94:: with SMTP id ft20mr535903pjb.69.1597372810201; Thu, 13 Aug 2020 19:40:10 -0700 (PDT) Received: from gurchetansingh0.mtv.corp.google.com ([2620:15c:202:201:5265:f3ff:fe2d:4d58]) by smtp.gmail.com with ESMTPSA id m26sm7103539pfe.184.2020.08.13.19.40.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Aug 2020 19:40:09 -0700 (PDT) From: Gurchetan Singh To: dri-devel@lists.freedesktop.org, virtio-dev@lists.oasis-open.org Subject: [PATCH 06/24] virtio: Implement get_shm_region for PCI transport Date: Thu, 13 Aug 2020 19:39:42 -0700 Message-Id: <20200814024000.2485-7-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200814024000.2485-1-gurchetansingh@chromium.org> References: <20200814024000.2485-1-gurchetansingh@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sebastien.boeuf@intel.com, kraxel@redhat.com, vgoyal@redhat.com, mst@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Sebastien Boeuf On PCI the shm regions are found using capability entries; find a region by searching for the capability. Signed-off-by: Sebastien Boeuf Signed-off-by: Dr. David Alan Gilbert --- drivers/virtio/virtio_pci_modern.c | 102 +++++++++++++++++++++++++++++ include/uapi/linux/virtio_pci.h | 11 +++- 2 files changed, 112 insertions(+), 1 deletion(-) diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c index db93cedd262f..484c2669e1f3 100644 --- a/drivers/virtio/virtio_pci_modern.c +++ b/drivers/virtio/virtio_pci_modern.c @@ -444,6 +444,106 @@ static void del_vq(struct virtio_pci_vq_info *info) vring_del_virtqueue(vq); } +static int virtio_pci_find_shm_cap(struct pci_dev *dev, u8 required_id, + u8 *bar, u64 *offset, u64 *len) +{ + int pos; + + for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR); pos > 0; + pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) { + u8 type, cap_len, id; + u32 tmp32; + u64 res_offset, res_length; + + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + cfg_type), + &type); + + if (type != VIRTIO_PCI_CAP_SHARED_MEMORY_CFG) + continue; + + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + cap_len), + &cap_len); + + if (cap_len != sizeof(struct virtio_pci_cap64)) { + dev_err(&dev->dev, "%s: shm cap with bad size offset:%d, size: %d\n", + __func__, pos, cap_len); + continue; + } + + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + id), + &id); + if (id != required_id) + continue; + + /* Type, and ID match, looks good */ + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap, + bar), + bar); + + /* Read the lower 32bit of length and offset */ + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, + offset), + &tmp32); + res_offset = tmp32; + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, + length), + &tmp32); + res_length = tmp32; + + /* and now the top half */ + pci_read_config_dword(dev, + pos + offsetof(struct virtio_pci_cap64, + offset_hi), + &tmp32); + + res_offset |= ((u64)tmp32) << 32; + pci_read_config_dword(dev, + pos + offsetof(struct virtio_pci_cap64, + length_hi), + &tmp32); + res_length |= ((u64)tmp32) << 32; + + *offset = res_offset; + *len = res_length; + + return pos; + } + + return 0; +} + +static bool vp_get_shm_region(struct virtio_device *vdev, + struct virtio_shm_region *region, u8 id) +{ + struct virtio_pci_device *vp_dev = to_vp_device(vdev); + struct pci_dev *pci_dev = vp_dev->pci_dev; + u8 bar; + u64 offset, len; + phys_addr_t phys_addr; + size_t bar_len; + + if (!virtio_pci_find_shm_cap(pci_dev, id, &bar, &offset, &len)) + return false; + + phys_addr = pci_resource_start(pci_dev, bar); + bar_len = pci_resource_len(pci_dev, bar); + + if (offset + len > bar_len) { + dev_err(&pci_dev->dev, + "%s: bar shorter than cap offset+len\n", + __func__); + return false; + } + + region->len = len; + region->addr = (u64) phys_addr + offset; + + return true; +} + static const struct virtio_config_ops virtio_pci_config_nodev_ops = { .get = NULL, .set = NULL, @@ -458,6 +558,7 @@ static const struct virtio_config_ops virtio_pci_config_nodev_ops = { .bus_name = vp_bus_name, .set_vq_affinity = vp_set_vq_affinity, .get_vq_affinity = vp_get_vq_affinity, + .get_shm_region = vp_get_shm_region, }; static const struct virtio_config_ops virtio_pci_config_ops = { @@ -474,6 +575,7 @@ static const struct virtio_config_ops virtio_pci_config_ops = { .bus_name = vp_bus_name, .set_vq_affinity = vp_set_vq_affinity, .get_vq_affinity = vp_get_vq_affinity, + .get_shm_region = vp_get_shm_region, }; /** diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h index 90007a1abcab..3a86f36d7e3d 100644 --- a/include/uapi/linux/virtio_pci.h +++ b/include/uapi/linux/virtio_pci.h @@ -113,6 +113,8 @@ #define VIRTIO_PCI_CAP_DEVICE_CFG 4 /* PCI configuration access */ #define VIRTIO_PCI_CAP_PCI_CFG 5 +/* Additional shared memory capability */ +#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8 /* This is the PCI capability header: */ struct virtio_pci_cap { @@ -121,11 +123,18 @@ struct virtio_pci_cap { __u8 cap_len; /* Generic PCI field: capability length */ __u8 cfg_type; /* Identifies the structure. */ __u8 bar; /* Where to find it. */ - __u8 padding[3]; /* Pad to full dword. */ + __u8 id; /* Multiple capabilities of the same type */ + __u8 padding[2]; /* Pad to full dword. */ __le32 offset; /* Offset within bar. */ __le32 length; /* Length of the structure, in bytes. */ }; +struct virtio_pci_cap64 { + struct virtio_pci_cap cap; + __le32 offset_hi; /* Most sig 32 bits of offset */ + __le32 length_hi; /* Most sig 32 bits of length */ +}; + struct virtio_pci_notify_cap { struct virtio_pci_cap cap; __le32 notify_off_multiplier; /* Multiplier for queue_notify_off. */