| Message ID | 20200915130339.11079-2-narmstrong@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | phy: amlogic: add MIPI DSI function to analog MIPI+PCIe PHY | expand |
On Tue, 15 Sep 2020 15:03:37 +0200, Neil Armstrong wrote: > The PHY registers happens to be at the beginning of a large zone containing > interleaved system registers (mainly clocks, power management, PHY control..), > found in all Amlogic SoC so far. > > The goal is to model it the same way as the other "features" of this zone, > like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml > and have a coherent bindings scheme over the Amlogic SoCs. > > This update the description, removed the reg attribute then updates the example > accordingly. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > .../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml index 18c1ec5e19ad..702763a84dac 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml @@ -9,27 +9,32 @@ title: Amlogic AXG shared MIPI/PCIE analog PHY maintainers: - Remi Pommarel <repk@triplefau.lt> +description: |+ + The Everything-Else Power Domains node should be the child of a syscon + node with the required property: + + - compatible: Should be the following: + "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon" + + Refer to the the bindings described in + Documentation/devicetree/bindings/mfd/syscon.yaml + properties: compatible: const: amlogic,axg-mipi-pcie-analog-phy - reg: - maxItems: 1 - "#phy-cells": const: 1 required: - compatible - - reg - "#phy-cells" additionalProperties: false examples: - | - mpphy: phy@0 { + mpphy: phy { compatible = "amlogic,axg-mipi-pcie-analog-phy"; - reg = <0x0 0xc>; #phy-cells = <1>; };
The PHY registers happens to be at the beginning of a large zone containing interleaved system registers (mainly clocks, power management, PHY control..), found in all Amlogic SoC so far. The goal is to model it the same way as the other "features" of this zone, like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml and have a coherent bindings scheme over the Amlogic SoCs. This update the description, removed the reg attribute then updates the example accordingly. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- .../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)