| Message ID | 20200916021541.500501-1-aditya.swarup@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] drm/i915/display: Add max plane width for NV12 AUX plane for Gen10+ platforms | expand |
On Tue, 15 Sep 2020, Aditya Swarup <aditya.swarup@intel.com> wrote: > Gen 10+ and Gen11+ platforms specify different max plane width for > planar formats. Add max plane width for GLK and ICL based on > BSpec: 7666 > > Fixes: 372b9ffb5799 ("drm/i915: Fix skl+ max plane width") > Fixes is part of the tags; no blank lines here please. > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Imre Deak <imre.deak@intel.com> > Signed-off-by: Aditya Swarup <aditya.swarup@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index f862403388f6..116fed1b7306 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3989,7 +3989,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) > const struct drm_framebuffer *fb = plane_state->hw.fb; > unsigned int rotation = plane_state->hw.rotation; > int uv_plane = 1; > - int max_width = skl_max_plane_width(fb, uv_plane, rotation); > + int max_width = 0; We don't usually initialize to zero when all code paths below initialize the variable before first use. > int max_height = 4096; > int x = plane_state->uapi.src.x1 >> 17; > int y = plane_state->uapi.src.y1 >> 17; > @@ -3997,6 +3997,13 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) > int h = drm_rect_height(&plane_state->uapi.src) >> 17; > u32 offset; > > + if (INTEL_GEN(i915) >= 11) > + max_width = icl_max_plane_width(fb, uv_plane, rotation); > + else if (INTEL_GEN(i915) >= 10 || IS_GEMINILAKE(i915)) > + max_width = glk_max_plane_width(fb, uv_plane, rotation); > + else > + max_width = skl_max_plane_width(fb, uv_plane, rotation); > + > intel_add_fb_offsets(&x, &y, plane_state, uv_plane); > offset = intel_plane_compute_aligned_offset(&x, &y, > plane_state, uv_plane);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f862403388f6..116fed1b7306 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3989,7 +3989,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) const struct drm_framebuffer *fb = plane_state->hw.fb; unsigned int rotation = plane_state->hw.rotation; int uv_plane = 1; - int max_width = skl_max_plane_width(fb, uv_plane, rotation); + int max_width = 0; int max_height = 4096; int x = plane_state->uapi.src.x1 >> 17; int y = plane_state->uapi.src.y1 >> 17; @@ -3997,6 +3997,13 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) int h = drm_rect_height(&plane_state->uapi.src) >> 17; u32 offset; + if (INTEL_GEN(i915) >= 11) + max_width = icl_max_plane_width(fb, uv_plane, rotation); + else if (INTEL_GEN(i915) >= 10 || IS_GEMINILAKE(i915)) + max_width = glk_max_plane_width(fb, uv_plane, rotation); + else + max_width = skl_max_plane_width(fb, uv_plane, rotation); + intel_add_fb_offsets(&x, &y, plane_state, uv_plane); offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, uv_plane);
Gen 10+ and Gen11+ platforms specify different max plane width for planar formats. Add max plane width for GLK and ICL based on BSpec: 7666 Fixes: 372b9ffb5799 ("drm/i915: Fix skl+ max plane width") Cc: Jani Nikula <jani.nikula@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)