ARM: Exynos: Add device tree node for Exynos4 interrupt combiner controller
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Message ID 1342068948-20755-1-git-send-email-thomas.abraham@linaro.org
State New, archived
Headers show

Commit Message

Thomas Abraham July 12, 2012, 4:55 a.m. UTC
Add node for Exynos4 interrupt combiner controller.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/boot/dts/exynos4210.dtsi |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

Comments

Kim Kukjin July 12, 2012, 9:10 a.m. UTC | #1
Thomas Abraham wrote:
> 
> Add node for Exynos4 interrupt combiner controller.
> 
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> ---
>  arch/arm/boot/dts/exynos4210.dtsi |   11 +++++++++++
>  1 files changed, 11 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi
> b/arch/arm/boot/dts/exynos4210.dtsi
> index a1dd2ee..0e4f659 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -33,6 +33,17 @@
>  		reg = <0x10490000 0x1000>, <0x10480000 0x100>;
>  	};
> 
> +	combiner:interrupt-controller@10440000 {
> +		compatible = "samsung,exynos4210-combiner";
> +		interrupt-controller;
> +		#interrupt-cells = <2>;

How about changing above ordering like interrupt gic controller?

+		#interrupt-cells = <2>;
+		interrupt-controller;

And, don't we need combiner-nr?
+		samsung,combiner-nr = <16>;

> +		reg = <0x10440000 0x1000>;
> +		interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
> +			     <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
> +			     <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
> +			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
> +	};
> +
>  	watchdog@10060000 {
>  		compatible = "samsung,s3c2410-wdt";
>  		reg = <0x10060000 0x100>;
> --
> 1.6.6.rc2

Others, looks good to me.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
Thomas Abraham July 13, 2012, 5:32 a.m. UTC | #2
On 12 July 2012 14:40, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Thomas Abraham wrote:
>>
>> Add node for Exynos4 interrupt combiner controller.
>>
>> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
>> ---
>>  arch/arm/boot/dts/exynos4210.dtsi |   11 +++++++++++
>>  1 files changed, 11 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos4210.dtsi
>> b/arch/arm/boot/dts/exynos4210.dtsi
>> index a1dd2ee..0e4f659 100644
>> --- a/arch/arm/boot/dts/exynos4210.dtsi
>> +++ b/arch/arm/boot/dts/exynos4210.dtsi
>> @@ -33,6 +33,17 @@
>>               reg = <0x10490000 0x1000>, <0x10480000 0x100>;
>>       };
>>
>> +     combiner:interrupt-controller@10440000 {
>> +             compatible = "samsung,exynos4210-combiner";
>> +             interrupt-controller;
>> +             #interrupt-cells = <2>;
>
> How about changing above ordering like interrupt gic controller?

Ok.

>
> +               #interrupt-cells = <2>;
> +               interrupt-controller;
>
> And, don't we need combiner-nr?
> +               samsung,combiner-nr = <16>;

'samsung,combiner-nr' is an optional property. If it is not specfied,
the default value is set as 16. So it is not required for Exynos4
combiner node.

I will resubmit this patch with your suggested change.

Thanks,
Thomas.

Patch
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diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index a1dd2ee..0e4f659 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -33,6 +33,17 @@ 
 		reg = <0x10490000 0x1000>, <0x10480000 0x100>;
 	};
 
+	combiner:interrupt-controller@10440000 {
+		compatible = "samsung,exynos4210-combiner";
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		reg = <0x10440000 0x1000>;
+		interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+			     <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+			     <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+	};
+
 	watchdog@10060000 {
 		compatible = "samsung,s3c2410-wdt";
 		reg = <0x10060000 0x100>;