| Message ID | 1350225191-8444-1-git-send-email-eich@suse.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, Oct 14, 2012 at 04:33:11PM +0200, Egbert Eich wrote: > The DPLL multipiler is set up in intel_display.c:i9xx_update_pll() > called from i9xx_crtc_mode_set(). > There the DPLL multiplier is adjusted so that the SDVO gets a sufficient > bus clock. > When cloning a CRTC between an SDVO driven encoder and the standard > DAC the DAC setup code reseted the multiplier value to 1 thus undoing > the correct setup. There is no need to touch the multiplier in the DAC > setup code: the correct value (i.e. 1 in case no SDVO encoder is used) > is set by i9xx_update_pll() already. > A comment at the code suggested that this code is a left over from the > days when there was no setup for clone modes. > > Signed-off-by: Egbert Eich <eich@suse.de> Picked up for -fixes, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index c42b980..ae3a3d5 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -220,20 +220,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, intel_encoder_to_crt(to_intel_encoder(encoder)); struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct drm_i915_private *dev_priv = dev->dev_private; - int dpll_md_reg; - u32 adpa, dpll_md; - - dpll_md_reg = DPLL_MD(intel_crtc->pipe); - - /* - * Disable separate mode multiplier used when cloning SDVO to CRT - * XXX this needs to be adjusted when we really are cloning - */ - if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { - dpll_md = I915_READ(dpll_md_reg); - I915_WRITE(dpll_md_reg, - dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); - } + u32 adpa; adpa = ADPA_HOTPLUG_BITS; if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
The DPLL multipiler is set up in intel_display.c:i9xx_update_pll() called from i9xx_crtc_mode_set(). There the DPLL multiplier is adjusted so that the SDVO gets a sufficient bus clock. When cloning a CRTC between an SDVO driven encoder and the standard DAC the DAC setup code reseted the multiplier value to 1 thus undoing the correct setup. There is no need to touch the multiplier in the DAC setup code: the correct value (i.e. 1 in case no SDVO encoder is used) is set by i9xx_update_pll() already. A comment at the code suggested that this code is a left over from the days when there was no setup for clone modes. Signed-off-by: Egbert Eich <eich@suse.de> --- drivers/gpu/drm/i915/intel_crt.c | 15 +-------------- 1 files changed, 1 insertions(+), 14 deletions(-)