[5/5] drm/i915: document a few more already implemented ilk w/as
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Message ID 1350553794-5534-6-git-send-email-daniel.vetter@ffwll.ch
State New, archived
Headers show

Commit Message

Daniel Vetter Oct. 18, 2012, 9:49 a.m. UTC
Found while strolling docs.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_pm.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Patch
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diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index aa77639..45ffb2c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3342,6 +3342,7 @@  static void ironlake_init_clock_gating(struct drm_device *dev)
 	/* Required for CxSR */
 	dspclk_gate |= DPARBUNIT_CLOCK_GATE_DISABLE;
 
+	/* WaDisableSVSMUnitClockGating */
 	I915_WRITE(PCH_3DCGDIS0,
 		   MARIUNIT_CLOCK_GATE_DISABLE |
 		   SVSMUNIT_CLOCK_GATE_DISABLE);
@@ -3353,7 +3354,7 @@  static void ironlake_init_clock_gating(struct drm_device *dev)
 	/*
 	 * According to the spec the following bits should be set in
 	 * order to enable memory self-refresh
-	 * The bit 22/21 of 0x42004
+	 * The bit 22/21 of 0x42004 (WaDisableDisplayFetchStrideStreching)
 	 * The bit 5 of 0x42020
 	 * The bit 15 of 0x45000
 	 */