From patchwork Mon Jan 12 08:10:15 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Shah X-Patchwork-Id: 1841 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n0C86wCx024216 for ; Mon, 12 Jan 2009 00:06:58 -0800 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750782AbZALIKw (ORCPT ); Mon, 12 Jan 2009 03:10:52 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1750770AbZALIKw (ORCPT ); Mon, 12 Jan 2009 03:10:52 -0500 Received: from hera.kernel.org ([140.211.167.34]:42013 "EHLO hera.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750782AbZALIKv (ORCPT ); Mon, 12 Jan 2009 03:10:51 -0500 Received: from hera.kernel.org (IDENT:U2FsdGVkX19+yE5QWcaw/6iucL03D/4Wx+EfmstUsOU@localhost [127.0.0.1]) by hera.kernel.org (8.14.2/8.14.2) with ESMTP id n0C8AGco027961 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 12 Jan 2009 08:10:16 GMT Received: (from amit@localhost) by hera.kernel.org (8.14.2/8.13.1/Submit) id n0C8AFpk027951; Mon, 12 Jan 2009 08:10:15 GMT From: Amit Shah To: qemu-devel@nongnu.org Cc: avi@redhat.com, kvm@vger.kernel.org, aliguori@us.ibm.com, Amit Shah Subject: [PATCH] KVM: CPUID takes ecx as input value for some functions Date: Mon, 12 Jan 2009 08:10:15 +0000 Message-Id: <1231747815-27858-1-git-send-email-amit.shah@redhat.com> X-Mailer: git-send-email 1.6.0.2 X-Virus-Scanned: ClamAV 0.93.3/8853/Mon Jan 12 00:26:44 2009 on hera.kernel.org X-Virus-Status: Clean X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=ham version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on hera.kernel.org X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.0 (hera.kernel.org [127.0.0.1]); Mon, 12 Jan 2009 08:10:18 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The CPUID instruction takes the value of ECX as an input parameter in addition to the value of EAX as the count for functions 4 and 0xb. Make sure we pass the value to the instruction. Also convert to the qemu-style whitespace for the surrounding code. Signed-off-by: Amit Shah --- qemu/target-i386/cpu.h | 2 +- qemu/target-i386/helper.c | 36 +++++++++++++++++++----------------- qemu/target-i386/op_helper.c | 2 +- 3 files changed, 21 insertions(+), 19 deletions(-) diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h index 944e386..d9834db 100644 --- a/qemu/target-i386/cpu.h +++ b/qemu/target-i386/cpu.h @@ -743,7 +743,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo, int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, int is_write, int mmu_idx, int is_softmmu); void cpu_x86_set_a20(CPUX86State *env, int a20_state); -void cpu_x86_cpuid(CPUX86State *env, uint32_t index, +void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c index cda0390..070c785 100644 --- a/qemu/target-i386/helper.c +++ b/qemu/target-i386/helper.c @@ -1377,7 +1377,8 @@ static void breakpoint_handler(CPUState *env) } #endif /* !CONFIG_USER_ONLY */ -static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx, +static void host_cpuid(uint32_t function, uint32_t count, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { #if defined(CONFIG_KVM) || defined(USE_KVM) @@ -1385,19 +1386,19 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx, #ifdef __x86_64__ asm volatile("cpuid" - : "=a"(vec[0]), "=b"(vec[1]), - "=c"(vec[2]), "=d"(vec[3]) - : "0"(function) : "cc"); + : "=a"(vec[0]), "=b"(vec[1]), + "=c"(vec[2]), "=d"(vec[3]) + : "0"(function), "c"(count) : "cc"); #else asm volatile("pusha \n\t" - "cpuid \n\t" - "mov %%eax, 0(%1) \n\t" - "mov %%ebx, 4(%1) \n\t" - "mov %%ecx, 8(%1) \n\t" - "mov %%edx, 12(%1) \n\t" - "popa" - : : "a"(function), "S"(vec) - : "memory", "cc"); + "cpuid \n\t" + "mov %%eax, 0(%1) \n\t" + "mov %%ebx, 4(%1) \n\t" + "mov %%ecx, 8(%1) \n\t" + "mov %%edx, 12(%1) \n\t" + "popa" + : : "a"(function), "c"(count), "S"(vec) + : "memory", "cc"); #endif if (eax) @@ -1411,10 +1412,12 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx, #endif } -void cpu_x86_cpuid(CPUX86State *env, uint32_t index, +void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { + + fprintf(stderr, "cpuid requested, %x, ecx=%x\n", index, *ecx); /* test if maximum index reached */ if (index & 0x80000000) { if (index > env->cpuid_xlevel) @@ -1436,7 +1439,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, * actuall cpu, and say goodbye to migration between different vendors * is you use compatibility mode. */ if (kvm_enabled()) - host_cpuid(0, NULL, ebx, ecx, edx); + host_cpuid(0, 0, NULL, ebx, ecx, edx); break; case 1: *eax = env->cpuid_version; @@ -1457,7 +1460,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, break; case 4: /* cache info: needed for Core compatibility */ - switch (*ecx) { + switch (count) { case 0: /* L1 dcache info */ *eax = 0x0000121; *ebx = 0x1c0003f; @@ -1483,7 +1486,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, *edx = 0; break; } - break; case 5: /* mwait info: needed for Core compatibility */ @@ -1528,7 +1530,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, if (kvm_enabled()) { uint32_t h_eax, h_edx; - host_cpuid(0x80000001, &h_eax, NULL, NULL, &h_edx); + host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx); /* disable CPU features that the host does not support */ diff --git a/qemu/target-i386/op_helper.c b/qemu/target-i386/op_helper.c index 6e0e32e..74ba643 100644 --- a/qemu/target-i386/op_helper.c +++ b/qemu/target-i386/op_helper.c @@ -1898,7 +1898,7 @@ void helper_cpuid(void) helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0); - cpu_x86_cpuid(env, (uint32_t)EAX, &eax, &ebx, &ecx, &edx); + cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx); EAX = eax; EBX = ebx; ECX = ecx;