Documentation/kbuild: correct variable definitions in makefiles.txt
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Message ID 1284964412-32211-1-git-send-email-mfm@muteddisk.com
State New, archived
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Commit Message

matt mooney Sept. 20, 2010, 6:33 a.m. UTC
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diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
index c787ae5..fe162f5 100644
--- a/Documentation/kbuild/makefiles.txt
+++ b/Documentation/kbuild/makefiles.txt
@@ -376,14 +376,13 @@  more details, with real examples.
 	Two variables are used when defining special rules:
 
     $(src)
-	$(src) is a relative path which points to the directory
-	where the Makefile is located. Always use $(src) when
-	referring to files located in the src tree.
+	The absolute path to the directory where the makefile is
+	located. Always use $(src) when referring to files located
+	in the src directory.
 
     $(obj)
-	$(obj) is a relative path which points to the directory
-	where the target is saved. Always use $(obj) when
-	referring to generated files.
+	The absolute path to the directory where the target is saved.
+	Always use $(obj) when referring to generated files.
 
 	Example:
 		#drivers/scsi/Makefile