OMAP3: PM: Fix the pwrdm_enable/disable_hdwr_sar funcs
diff mbox

Message ID 1244206853-4426-1-git-send-email-rnayak@ti.com
State Superseded
Delegated to: Kevin Hilman
Headers show

Commit Message

Rajendra Nayak June 5, 2009, 1 p.m. UTC
The pwrdm_enable_hdwr_sar/pwrdm_disable_hdwr_sar do not
actually set/reset the SAVEANDRESTORE bit in the PWSTCTRL
register but modify some other bit instead.
This happens due to the OMAP3430ES2_SAVEANDRESTORE_SHIFT
being defined as (1 << 4) instead of just 4.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
 arch/arm/mach-omap2/prm-regbits-34xx.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Kevin Hilman June 5, 2009, 10:10 p.m. UTC | #1
Rajendra Nayak <rnayak@ti.com> writes:

> The pwrdm_enable_hdwr_sar/pwrdm_disable_hdwr_sar do not
> actually set/reset the SAVEANDRESTORE bit in the PWSTCTRL
> register but modify some other bit instead.
> This happens due to the OMAP3430ES2_SAVEANDRESTORE_SHIFT
> being defined as (1 << 4) instead of just 4.
>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>

Thanks, pushing to PM branch.

I'll wait to hear from Kalle if we can revert his previous patch
for this.

Kevin

> ---
>  arch/arm/mach-omap2/prm-regbits-34xx.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
> index 06fee29..d4ea370 100644
> --- a/arch/arm/mach-omap2/prm-regbits-34xx.h
> +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
> @@ -411,7 +411,7 @@
>  /* PM_PREPWSTST_CAM specific bits */
>  
>  /* PM_PWSTCTRL_USBHOST specific bits */
> -#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		(1 << 4)
> +#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		4
>  
>  /* RM_RSTST_PER specific bits */
>  
> -- 
> 1.5.4.7
>
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Paul Walmsley June 5, 2009, 10:44 p.m. UTC | #2
On Fri, 5 Jun 2009, Kevin Hilman wrote:

> Rajendra Nayak <rnayak@ti.com> writes:
> 
> > The pwrdm_enable_hdwr_sar/pwrdm_disable_hdwr_sar do not
> > actually set/reset the SAVEANDRESTORE bit in the PWSTCTRL
> > register but modify some other bit instead.
> > This happens due to the OMAP3430ES2_SAVEANDRESTORE_SHIFT
> > being defined as (1 << 4) instead of just 4.
> >
> > Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> 
> Thanks, pushing to PM branch.
> 
> I'll wait to hear from Kalle if we can revert his previous patch
> for this.

I think Kalle covered this one already:

http://patchwork.kernel.org/patch/15586/

- Paul

> 
> Kevin
> 
> > ---
> >  arch/arm/mach-omap2/prm-regbits-34xx.h |    2 +-
> >  1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
> > index 06fee29..d4ea370 100644
> > --- a/arch/arm/mach-omap2/prm-regbits-34xx.h
> > +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
> > @@ -411,7 +411,7 @@
> >  /* PM_PREPWSTST_CAM specific bits */
> >  
> >  /* PM_PWSTCTRL_USBHOST specific bits */
> > -#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		(1 << 4)
> > +#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		4
> >  
> >  /* RM_RSTST_PER specific bits */
> >  
> > -- 
> > 1.5.4.7
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> --
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> 


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Kevin Hilman June 5, 2009, 10:53 p.m. UTC | #3
Paul Walmsley <paul@pwsan.com> writes:

> On Fri, 5 Jun 2009, Kevin Hilman wrote:
>
>> Rajendra Nayak <rnayak@ti.com> writes:
>> 
>> > The pwrdm_enable_hdwr_sar/pwrdm_disable_hdwr_sar do not
>> > actually set/reset the SAVEANDRESTORE bit in the PWSTCTRL
>> > register but modify some other bit instead.
>> > This happens due to the OMAP3430ES2_SAVEANDRESTORE_SHIFT
>> > being defined as (1 << 4) instead of just 4.
>> >
>> > Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>> 
>> Thanks, pushing to PM branch.
>> 
>> I'll wait to hear from Kalle if we can revert his previous patch
>> for this.
>
> I think Kalle covered this one already:
>
> http://patchwork.kernel.org/patch/15586/

... but was missing from PM branch.  Remedied now.

But we also have a patch in the PM branch[1] which disables the
USBHOST SAR by removing the HAS_HDWR_SAR flag for the pwrdm.

I'm gessing/hoping that fixing this shift value allows us to
revert that patch and am hoping for some confirmation from 
Kalle.

Kevin

[1]  http://git.kernel.org/?p=linux/kernel/git/khilman/linux-omap-pm.git;a=commit;h=942fc93ce6b5ec7999f7864f6bb088cc8f308f45
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Kalle Jokiniemi June 8, 2009, 7:57 a.m. UTC | #4

Patch
diff mbox

diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 06fee29..d4ea370 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -411,7 +411,7 @@ 
 /* PM_PREPWSTST_CAM specific bits */
 
 /* PM_PWSTCTRL_USBHOST specific bits */
-#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		(1 << 4)
+#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		4
 
 /* RM_RSTST_PER specific bits */