bootarg mpurate is ignored

Commit Message

Sanjeev Premi June 25, 2009, 5:06 p.m. UTC

Hi,

I was trying to change the MPU frequency by using the bootarg mpurate.
But there was no impact of the same.

In the bootlog:
...
...
Clocking rate (Crystal/DPLL/ARM core): 26.0/332/500 MHz
...later..
Switched to new clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz
...
...

From the code, it clearly seemed to be ignored. So, I made the change below:


Now the bootlog seems fine:
...
...
Clocking rate (Crystal/DPLL/ARM core): 26.0/332/500 MHz
...later..
Switched to new clocking rate (Crystal/Core/MPU): 26.0/332/550 MHz
...
...
However, cat /cpu/procinfo still shows:
Processor       : ARMv7 Processor rev 3 (v7l)
BogoMIPS        : 499.92
Features        : swp half thumb fastmult vfp edsp neon vfpv3
CPU implementer : 0x41
CPU architecture: 7
CPU variant     : 0x1
CPU part        : 0xc08
CPU revision    : 3

Am I missing some step here?
Also, I tried changing arm_ck directly (evidently not right) as well :(
	
Best regards,
Sanjeev
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Patch

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 045da92..5bdd978 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -948,13 +948,20 @@  static int __init omap2_clk_arch_init(void)
        if (clk_set_rate(&virt_prcm_set, mpurate))
                printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif
+       printk(KERN_ERR "Before change: %ld\n", dpll1_ck.rate);
+
+       if (clk_set_rate(&dpll1_ck, mpurate))
+               printk(KERN_ERR "*** Unable to set MPU rate\n");
+       omap3_dpll_recalc(&dpll1_ck);
+
+       printk(KERN_ERR "After change: %ld\n", dpll1_ck.rate);

        recalculate_root_clocks();

-       printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+       printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
               "%ld.%01ld/%ld/%ld MHz\n",
               (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-              (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+              (core_ck.rate / 1000000), (dpll1_ck.rate / 1000000)) ;

        return 0;
 }