From patchwork Mon Jan 6 05:58:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 3435511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A10AA9F2E9 for ; Mon, 6 Jan 2014 06:01:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B8BB92016C for ; Mon, 6 Jan 2014 06:01:36 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D8AA20166 for ; Mon, 6 Jan 2014 06:01:35 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W03E2-0000AH-T2; Mon, 06 Jan 2014 05:59:48 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W03Dg-0000TX-5y; Mon, 06 Jan 2014 05:59:24 +0000 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W03D2-0000OU-Nv for linux-arm-kernel@lists.infradead.org; Mon, 06 Jan 2014 05:58:48 +0000 Received: from mirror2.csie.ntu.edu.tw (mirror2.csie.ntu.edu.tw [140.112.30.76]) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id E43AC208A0; Mon, 6 Jan 2014 13:58:13 +0800 (CST) Received: from wens by mirror2.csie.ntu.edu.tw with local (Exim 4.82) (envelope-from ) id 1W03CX-0006Bt-S4; Mon, 06 Jan 2014 13:58:13 +0800 From: Chen-Yu Tsai To: Maxime Ripard , Emilio Lopez , Mike Turquette Subject: [PATCH v2 5/8] arm: dts: sun5i: rename clock node names to clk@N Date: Mon, 6 Jan 2014 13:58:09 +0800 Message-Id: <1388987892-23733-6-git-send-email-wens@csie.org> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1388987892-23733-1-git-send-email-wens@csie.org> References: <1388987892-23733-1-git-send-email-wens@csie.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140106_005845_222614_B1111E89 X-CRM114-Status: UNSURE ( 7.32 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.0 (--) Cc: Chen-Yu Tsai , linux-sunxi , linux-arm-kernel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Device tree naming conventions state that node names should match node function. Change fully functioning clock nodes to match. Also add the output name for pll5 to use as the clock name. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun5i-a10s.dtsi | 26 +++++++++++++++----------- arch/arm/boot/dts/sun5i-a13.dtsi | 26 +++++++++++++++----------- 2 files changed, 30 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 78360b3..b67553b 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -47,42 +47,46 @@ clock-frequency = <0>; }; - osc24M: osc24M@01c20050 { + osc24M: clk@01c20050 { #clock-cells = <0>; compatible = "allwinner,sun4i-osc-clk"; reg = <0x01c20050 0x4>; clock-frequency = <24000000>; + clock-output-names = "osc24M"; }; - osc32k: osc32k { + osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; + clock-output-names = "osc32k"; }; - pll1: pll1@01c20000 { + pll1: clk@01c20000 { #clock-cells = <0>; compatible = "allwinner,sun4i-pll1-clk"; reg = <0x01c20000 0x4>; clocks = <&osc24M>; + clock-output-names = "pll1"; }; - pll4: pll4@01c20018 { + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-pll1-clk"; reg = <0x01c20018 0x4>; clocks = <&osc24M>; + clock-output-names = "pll4"; }; - pll5: pll5@01c20020 { + pll5: clk@01c20020 { #clock-cells = <1>; compatible = "allwinner,sun4i-pll5-clk"; reg = <0x01c20020 0x4>; clocks = <&osc24M>; - clock-output-names = "pll5_ddr", "pll5_other"; + clock-output-names = "pll5_ddr", "pll5_other", "pll5"; }; - pll6: pll6@01c20028 { + pll6: clk@01c20028 { #clock-cells = <1>; compatible = "allwinner,sun4i-pll6-clk"; reg = <0x01c20028 0x4>; @@ -105,7 +109,7 @@ clocks = <&cpu>; }; - axi_gates: axi_gates@01c2005c { + axi_gates: clk@01c2005c { #clock-cells = <1>; compatible = "allwinner,sun4i-axi-gates-clk"; reg = <0x01c2005c 0x4>; @@ -120,7 +124,7 @@ clocks = <&axi>; }; - ahb_gates: ahb_gates@01c20060 { + ahb_gates: clk@01c20060 { #clock-cells = <1>; compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; reg = <0x01c20060 0x8>; @@ -141,7 +145,7 @@ clocks = <&ahb>; }; - apb0_gates: apb0_gates@01c20068 { + apb0_gates: clk@01c20068 { #clock-cells = <1>; compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; reg = <0x01c20068 0x4>; @@ -164,7 +168,7 @@ clocks = <&apb1_mux>; }; - apb1_gates: apb1_gates@01c2006c { + apb1_gates: clk@01c2006c { #clock-cells = <1>; compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; reg = <0x01c2006c 0x4>; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 2f37ca5..76d6f7a 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -47,42 +47,46 @@ clock-frequency = <0>; }; - osc24M: osc24M@01c20050 { + osc24M: clk@01c20050 { #clock-cells = <0>; compatible = "allwinner,sun4i-osc-clk"; reg = <0x01c20050 0x4>; clock-frequency = <24000000>; + clock-output-names = "osc24M"; }; - osc32k: osc32k { + osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; + clock-output-names = "osc32k"; }; - pll1: pll1@01c20000 { + pll1: clk@01c20000 { #clock-cells = <0>; compatible = "allwinner,sun4i-pll1-clk"; reg = <0x01c20000 0x4>; clocks = <&osc24M>; + clock-output-names = "pll1"; }; - pll4: pll4@01c20018 { + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-pll1-clk"; reg = <0x01c20018 0x4>; clocks = <&osc24M>; + clock-output-names = "pll4"; }; - pll5: pll5@01c20020 { + pll5: clk@01c20020 { #clock-cells = <1>; compatible = "allwinner,sun4i-pll5-clk"; reg = <0x01c20020 0x4>; clocks = <&osc24M>; - clock-output-names = "pll5_ddr", "pll5_other"; + clock-output-names = "pll5_ddr", "pll5_other", "pll5"; }; - pll6: pll6@01c20028 { + pll6: clk@01c20028 { #clock-cells = <1>; compatible = "allwinner,sun4i-pll6-clk"; reg = <0x01c20028 0x4>; @@ -105,7 +109,7 @@ clocks = <&cpu>; }; - axi_gates: axi_gates@01c2005c { + axi_gates: clk@01c2005c { #clock-cells = <1>; compatible = "allwinner,sun4i-axi-gates-clk"; reg = <0x01c2005c 0x4>; @@ -120,7 +124,7 @@ clocks = <&axi>; }; - ahb_gates: ahb_gates@01c20060 { + ahb_gates: clk@01c20060 { #clock-cells = <1>; compatible = "allwinner,sun5i-a13-ahb-gates-clk"; reg = <0x01c20060 0x8>; @@ -140,7 +144,7 @@ clocks = <&ahb>; }; - apb0_gates: apb0_gates@01c20068 { + apb0_gates: clk@01c20068 { #clock-cells = <1>; compatible = "allwinner,sun5i-a13-apb0-gates-clk"; reg = <0x01c20068 0x4>; @@ -162,7 +166,7 @@ clocks = <&apb1_mux>; }; - apb1_gates: apb1_gates@01c2006c { + apb1_gates: clk@01c2006c { #clock-cells = <1>; compatible = "allwinner,sun5i-a13-apb1-gates-clk"; reg = <0x01c2006c 0x4>;