From patchwork Tue Mar 18 05:08:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dylan Reid X-Patchwork-Id: 3847241 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A85A9BF540 for ; Tue, 18 Mar 2014 05:09:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B2B58202AE for ; Tue, 18 Mar 2014 05:09:19 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 65CE320149 for ; Tue, 18 Mar 2014 05:09:18 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 22106261AA1; Tue, 18 Mar 2014 06:09:17 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 44005261A9A; Tue, 18 Mar 2014 06:09:01 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 88369261ABB; Tue, 18 Mar 2014 06:08:59 +0100 (CET) Received: from mail-ie0-f202.google.com (mail-ie0-f202.google.com [209.85.223.202]) by alsa0.perex.cz (Postfix) with ESMTP id B3AAB261A99 for ; Tue, 18 Mar 2014 06:08:52 +0100 (CET) Received: by mail-ie0-f202.google.com with SMTP id lx4so1318151iec.3 for ; Mon, 17 Mar 2014 22:08:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=1pSF/DiWbuJZvhBxmnsor+4yqmKJaZs4t0ABfgVM7mE=; b=AB7nrvrmMCu5qc6R1q72mrQOBRSHkg+QG7jEFKX/sSjcWZI9f2MJZJYnBA/HwdM67T evj6b/Oix1TouGIzwBeU/IQupMvxqcVhWtAndj1i73oLm2GiHWciPL422CFhDq/YvYXz oJLimjuG0mUo4dccwVPfnMPKARrV4UYht9UcQwURBiV+n+tOfGrtHJn4iv05Bf756mm7 F/TgD3wx+jS8Xcg8Hiz7VEV0MTIqz3D4cyVBakxd8V6PR1lChlQWTD04Rv2JTN/GnDvO lsqE1GBEWl8XrmKTE893zyjIAXhNu76BFkV55ZZI6Et8Glptum7pTRh/zngr8dgJeMfC yUsA== X-Gm-Message-State: ALoCoQkgpCUc9WZKbDuwqDjh+GNvBvh4Aa519bpqRpmB+sbzvG2s5cLR/p5xqu6+BR1yrd6pnRonn9Z9MmL3c8wyP361lpL02u2o17n1ndDEJIPsSwIkF59xEQ1NFY+ib26b9JuXCBrj5xiA/4gA+nvhF86S/O3fxmsqqfXq/qfQ8zfD2Unlpt2n8ovsja9HJOaKgiXD1DLFlnr4UtM+JYjLaFEKhYv7vRbLUQAx6lnd/tAK3FcT4tU= X-Received: by 10.50.178.200 with SMTP id da8mr7016880igc.6.1395119331714; Mon, 17 Mar 2014 22:08:51 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id u4si2687261yhb.5.2014.03.17.22.08.51 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Mar 2014 22:08:51 -0700 (PDT) Received: from hojo20.mtv.corp.google.com (hojo20.mtv.corp.google.com [172.22.72.28]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id 7086C31C022; Mon, 17 Mar 2014 22:08:51 -0700 (PDT) Received: by hojo20.mtv.corp.google.com (Postfix, from userid 123195) id 099A0181474; Mon, 17 Mar 2014 22:08:50 -0700 (PDT) From: Dylan Reid To: alsa-devel@alsa-project.org Date: Mon, 17 Mar 2014 22:08:49 -0700 Message-Id: <1395119329-30721-1-git-send-email-dgreid@chromium.org> X-Mailer: git-send-email 1.8.1.3.605.g02339dd Cc: linux-tegra@vger.kernel.org, abrestic@chromium.org, Dylan Reid , broonie@kernel.org, swarren@wwwdotorg.org Subject: [alsa-devel] [PATCH v2] ASoC: tegra: Use flat regcache. X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP When using an rbtree cache, there can be allocations the first time a register is accessed. This can cause an attempt to schedule while atomic in the case that the regmap is using a spinlock. This could be fixed by either initializing all the registers or using a flat cache. The register maps for tegra30_ahub and tegra30_i2s are dense and don't save much from using a tree so convert them to flat. Tegra30 changes tested on Norrin, Tegra20 changes compile. Signed-off-by: Dylan Reid Tested-by: Stephen Warren --- Changes v1 to v2: Fix Tegra20 fix as well. sound/soc/tegra/tegra20_ac97.c | 2 +- sound/soc/tegra/tegra20_das.c | 2 +- sound/soc/tegra/tegra20_i2s.c | 2 +- sound/soc/tegra/tegra20_spdif.c | 2 +- sound/soc/tegra/tegra30_ahub.c | 4 ++-- sound/soc/tegra/tegra30_i2s.c | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c index cf5e1cf..0a59e23 100644 --- a/sound/soc/tegra/tegra20_ac97.c +++ b/sound/soc/tegra/tegra20_ac97.c @@ -306,7 +306,7 @@ static const struct regmap_config tegra20_ac97_regmap_config = { .readable_reg = tegra20_ac97_wr_rd_reg, .volatile_reg = tegra20_ac97_volatile_reg, .precious_reg = tegra20_ac97_precious_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static int tegra20_ac97_platform_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra20_das.c b/sound/soc/tegra/tegra20_das.c index e723929..a634f13 100644 --- a/sound/soc/tegra/tegra20_das.c +++ b/sound/soc/tegra/tegra20_das.c @@ -128,7 +128,7 @@ static const struct regmap_config tegra20_das_regmap_config = { .max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL), .writeable_reg = tegra20_das_wr_rd_reg, .readable_reg = tegra20_das_wr_rd_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static int tegra20_das_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c index 42c1f6b..79a9932 100644 --- a/sound/soc/tegra/tegra20_i2s.c +++ b/sound/soc/tegra/tegra20_i2s.c @@ -333,7 +333,7 @@ static const struct regmap_config tegra20_i2s_regmap_config = { .readable_reg = tegra20_i2s_wr_rd_reg, .volatile_reg = tegra20_i2s_volatile_reg, .precious_reg = tegra20_i2s_precious_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static int tegra20_i2s_platform_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c index 8c7c102..a0ce924 100644 --- a/sound/soc/tegra/tegra20_spdif.c +++ b/sound/soc/tegra/tegra20_spdif.c @@ -259,7 +259,7 @@ static const struct regmap_config tegra20_spdif_regmap_config = { .readable_reg = tegra20_spdif_wr_rd_reg, .volatile_reg = tegra20_spdif_volatile_reg, .precious_reg = tegra20_spdif_precious_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static int tegra20_spdif_platform_probe(struct platform_device *pdev) diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index d6f4c99..0db68f4 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -471,7 +471,7 @@ static const struct regmap_config tegra30_ahub_apbif_regmap_config = { .readable_reg = tegra30_ahub_apbif_wr_rd_reg, .volatile_reg = tegra30_ahub_apbif_volatile_reg, .precious_reg = tegra30_ahub_apbif_precious_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static bool tegra30_ahub_ahub_wr_rd_reg(struct device *dev, unsigned int reg) @@ -490,7 +490,7 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = { .max_register = LAST_REG(AUDIO_RX), .writeable_reg = tegra30_ahub_ahub_wr_rd_reg, .readable_reg = tegra30_ahub_ahub_wr_rd_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static struct tegra30_ahub_soc_data soc_data_tegra30 = { diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c index 49ad936..f146c41 100644 --- a/sound/soc/tegra/tegra30_i2s.c +++ b/sound/soc/tegra/tegra30_i2s.c @@ -357,7 +357,7 @@ static const struct regmap_config tegra30_i2s_regmap_config = { .writeable_reg = tegra30_i2s_wr_rd_reg, .readable_reg = tegra30_i2s_wr_rd_reg, .volatile_reg = tegra30_i2s_volatile_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_FLAT, }; static const struct tegra30_i2s_soc_data tegra30_i2s_config = {